IP Library › Granted Patent US 11,450,295
Granted Patent B2
US 11,450,295 · App. 16/537,962 · Granted Sep 20, 2022

Charge compensation circuit, charge compensation method, and display device

Inventors: Wenxu Lyu (Beijing, CN); Xinqiu Wang (Beijing, CN); Xue Dong (Beijing, CN); Ming Chen (Beijing, CN); Wei Sun (Beijing, CN); Hsinchung Lo (Beijing, CN)
Assignees: Beijing BOE Display Technology Co., Ltd.; Beijing BOE Technology Development Co., Ltd.
G09G3/3696G09G3/3685G09G2320/0223G09G2340/06
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Quick Facts
Patent No.
US 11,450,295
App. No.
16/537,962
Granted
Sep 20, 2022
Kind
B2
Abstract

A charge compensation circuit of the present disclosure includes: a sorting sub-circuit, configured to sort inputted initial data voltages according to a pixel structure type to obtain a plurality of channels of data, each channel of the data including initial data voltages corresponding to all data lines when a gate line in a row corresponding to the channel is turned on; a storage comparison sub-circuit, configured to output many sets of comparison data according to the stored data; a lookup sub-circuit, configured to look up actual compensation data corresponding to the set of comparison data; and a compensation sub-circuit, configured to compensate for the initial data voltage on a data line corresponding to the actual compensation data when the gate line in the current row is turned on, to obtain an actual data voltage on the data line when the gate line in the current row is turned on.

Claims (1117)

1. A charge compensation circuit, applied to a display device and comprising:

a sorting sub-circuit, configured to sort inputted initial data voltages according to a pixel structure type of the display device to obtain a plurality of channels of data, each channel of the data comprising initial data voltages corresponding to all data lines when a gate line in a row corresponding to the channel is turned on;

a storage comparison sub-circuit, configured to store the sorted data and output a plurality of sets of comparison data according to the stored data, each set of the comparison data comprising an actual data voltage on a data line when a gate line in a row immediately preceding a current row is turned on, and an initial data voltage on the same data line when the gate line in the current row is turned on;

a lookup sub-circuit, configured to look up, based on each of the sets of comparison data, actual compensation data corresponding to the set of comparison data; and

a compensation sub-circuit, configured to compensate for, based on the actual compensation data, the initial data voltage on a data line corresponding to the actual compensation data when the gate line in the current row is turned on, to obtain an actual data voltage on the data line when the gate line in the current row is turned on,

wherein the storage comparison sub-circuit is further configured to store the actual data voltages on all the data lines when the gate line in the current row is turned on,

wherein the lookup sub-circuit comprises:

a compensation initial data lookup sub-circuit, configured to look up, based on each of the sets of comparison data, initial compensation data corresponding to the set of comparison data in a compensation initial data lookup table;

a gain lookup sub-circuit, configured to look up, based on each of the sets of comparison data, a compensation gain corresponding to the set of comparison data in a gain lookup table; and

a calculation sub-circuit, configured to calculate the actual compensation data based on the initial compensation data and the compensation gain,

wherein the compensation initial data lookup sub-circuit is further configured to determine an initial compensation data c corresponding to comparison data (a, b) according to the following formulas:

f

⁡

(

R

⁢

⁢

1

)

=

x

⁢

⁢

(

s

+

1

)

-

a

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

11

)

+

a

-

xs

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

21

)

f

⁡

(

R

⁢

⁢

2

)

=

x

⁢

⁢

(

s

+

1

)

-

a

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

12

)

+

a

-

xs

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

22

)

f

⁡

(

p

)

=

y

⁢

⁢

(

r

+

1

)

-

b

y

⁢

⁢

(

r

+

1

)

-

yr

⁢

f

⁡

(

R

⁢

⁢

1

)

+

b

-

yr

y

⁢

⁢

(

r

+

1

)

-

yr

⁢

f

⁡

(

R

⁢

⁢

2

)

where the comparison data (a, b) has a corresponding coordinate point in the compensation initial data lookup table, which is located in a region defined by coordinate points (xs, yr), (xs, y(r+1)), (x(s+1), yr), (x(s+1), y(r+1)); f(Q11) is a value corresponding to the coordinate point (xs, yr) in the compensation initial data lookup table, f(Q12) is a value corresponding to the coordinate point (xs, y(r+1)) in the compensation initial data lookup table, f(Q21) is a value corresponding to the coordinate point (x(s+1), yr) in the compensation initial data lookup table, and f(Q22) is a value corresponding to the coordinate point (x(s+1), y(r+1)) in the compensation initial data lookup table; and a value of f(p) is c.

2. The charge compensation circuit according to claim 1 , wherein the sorting sub-circuit comprises:

a pixel structure type acquiring sub-circuit, configured to acquire a pixel structure type of the display device.

3. The charge compensation circuit according to claim 1 , wherein the storage comparison sub-circuit comprises:

a first storage sub-circuit, configured to store initial data voltages on all the data lines when the gate line in the row immediately preceding the current row is turned on;

a second storage sub-circuit, configured to store actual data voltages on all the data lines when the gate line in the row immediately preceding the current row is turned on;

a third storage sub-circuit, configured to store initial data voltages on all the data lines when the gate line in the current row is turned on; and

a fourth storage sub-circuit, configured to store actual data voltages on all the data lines when the gate line in the current row is turned on.

4. The charge compensation circuit according to claim 3 , wherein the storage comparison sub-circuit further comprises:

a sorting sub-circuit configured to sort the data stored in the storage comparison sub-circuit and output a plurality of sets of comparison data.

5. The charge compensation circuit according to claim 1 , wherein the gain lookup sub-circuit is further configured to calculate a compensation gain corresponding to the comparison data (a, b) by using the following formulas:

f

⁡

(

G

⁢

⁢

1

)

=

e

⁢

⁢

2

-

e

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

11

)

+

e

-

e

⁢

⁢

1

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

21

)

f

⁡

(

G

⁢

⁢

2

)

=

e

⁢

⁢

2

-

e

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

12

)

+

e

-

e

⁢

⁢

1

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

22

)

f

⁡

(

G

)

=

f

⁢

⁢

2

-

f

f

⁢

⁢

2

-

f

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

1

)

+

f

-

f

⁢

⁢

1

f

⁢

⁢

2

-

f

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

2

)

where a pixel coordinate of a sub-pixel corresponding to the comparison data (a, b) is (e, f), which is located in a region defined by coordinate points (e1, f1), (e1, f2), (e2, f1), and (e2, f2); f(G11) is a compensation gain corresponding to the coordinate point (e1, f1), f(G12) is a compensation gain corresponding to the coordinate point (e1, f2), f(G21) is a compensation gain corresponding to the coordinate point (e2, f1), and f(G22) is a compensation gain corresponding to the coordinate point (e2, f2); and f(G) is g.

6. A display device, comprising a charge compensation circuit that is applied to a display device, the charge compensation circuit comprising:

a sorting sub-circuit, configured to sort inputted initial data voltages according to a pixel structure type of the display device to obtain a plurality of channels of data, each channel of the data comprising initial data voltages corresponding to all data lines when a gate line in a row corresponding to the channel is turned on;

a storage comparison sub-circuit, configured to store the sorted data and output a plurality of sets of comparison data according to the stored data, each set of the comparison data comprising an actual data voltage on a data line when a gate line in a row immediately preceding a current row is turned on, and an initial data voltage on the same data line when the gate line in the current row is turned on;

a lookup sub-circuit, configured to look up, based on each of the sets of comparison data, actual compensation data corresponding to the set of comparison data; and

a compensation sub-circuit, configured to, based on the actual compensation data, compensate for the initial data voltage on a data line corresponding to the actual compensation data when the gate line in the current row is turned on, to obtain an actual data voltage on the data line when the gate line in the current row is turned on,

wherein the storage comparison sub-circuit is further configured to store the actual data voltages on all the data lines when the gate line in the current row is turned on,

wherein the lookup sub-circuit comprises:

a compensation initial data lookup sub-circuit, configured to look up, based on each of the sets of comparison data, initial compensation data corresponding to the set of comparison data in a compensation initial data lookup table;

a gain lookup sub-circuit, configured to look up, based on each of the sets of comparison data, a compensation gain corresponding to the set of comparison data in a gain lookup table; and

a calculation sub-circuit, configured to calculate the actual compensation data based on the initial compensation data and the compensation gain;

wherein the compensation initial data lookup sub-circuit is further configured to determine an initial compensation data c corresponding to comparison data (a, b) according to the following formulas:

f

⁡

(

R

⁢

⁢

1

)

=

x

⁢

⁢

(

s

+

1

)

-

a

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

11

)

+

a

-

xs

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

21

)

f

⁡

(

R

⁢

⁢

2

)

=

x

⁢

⁢

(

s

+

1

)

-

a

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

12

)

+

a

-

xs

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

22

)

f

⁡

(

p

)

=

y

⁢

⁢

(

r

+

1

)

-

b

y

⁢

⁢

(

r

+

1

)

-

yr

⁢

f

⁡

(

R

⁢

⁢

1

)

+

b

-

yr

y

⁢

⁢

(

r

+

1

)

-

yr

⁢

f

⁡

(

R

⁢

⁢

2

)

where the comparison data (a, b) has a corresponding coordinate point in the compensation initial data lookup table, which is located in a region defined by coordinate points (xs, yr), (xs, y(r+1)), (x(s+1), yr), (x(s+1), y(r+1)); f(Q11) is a value corresponding to the coordinate point (xs, yr) in the compensation initial data lookup table, f(Q12) is a value corresponding to the coordinate point (xs, y(r+1)) in the compensation initial data lookup table, f(Q21) is a value corresponding to the coordinate point (x(s+1), yr) in the compensation initial data lookup table, and f(Q22) is a value corresponding to the coordinate point (x(s+1), y(r+1)) in the compensation initial data lookup table; and a value of f(p) is c.

7. The display device according to claim 6 , wherein the sorting sub-circuit comprises:

a pixel structure type acquiring sub-circuit, configured to acquire a pixel structure type of the display device.

8. The display device according to claim 6 , wherein the storage comparison sub-circuit comprises:

a first storage sub-circuit, configured to store initial data voltages on all the data lines when the gate line in the row immediately preceding the current row is turned on;

a second storage sub-circuit, configured to store actual data voltages on all the data lines when the gate line in the row immediately preceding the current row is turned on;

a third storage sub-circuit, configured to store initial data voltages on all the data lines when the gate line in the current row is turned on; and

a fourth storage sub-circuit, configured to store actual data voltages on all the data lines when the gate line in the current row is turned on.

9. The display device according to claim 8 , wherein the storage comparison sub-circuit further comprises:

a sorting sub-circuit configured to sort the data stored in the storage comparison sub-circuit and output a plurality of sets of comparison data.

10. The display device according to claim 6 , wherein the gain lookup sub-circuit is further configured to calculate a compensation gain corresponding to the comparison data (a, b) by using the following formulas:

f

⁡

(

G

⁢

⁢

1

)

=

e

⁢

⁢

2

-

e

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

11

)

+

e

-

e

⁢

⁢

1

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

21

)

f

⁡

(

G

⁢

⁢

2

)

=

e

⁢

⁢

2

-

e

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

12

)

+

e

-

e

⁢

⁢

1

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

22

)

f

⁡

(

G

)

=

f

⁢

⁢

2

-

f

f

⁢

⁢

2

-

f

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

1

)

+

f

-

f

⁢

⁢

1

f

⁢

⁢

2

-

f

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

2

)

where a pixel coordinate of a sub-pixel corresponding to the comparison data (a, b) is (e, f), which is located in a region defined by coordinate points (e1, f1), (e1, f2), (e2, f1), and (e2, f2); f(G11) is a compensation gain corresponding to the coordinate point (e1, f1), f(G12) is a compensation gain corresponding to the coordinate point (e1, f2), f(G21) is a compensation gain corresponding to the coordinate point (e2, f1), and f(G22) is a compensation gain corresponding to the coordinate point (e2, f2); and f(G) is g.

11. The display device according to claim 6 , wherein the display device has a large-sized liquid crystal panel of more than 65 inches.

12. A charge compensation method, applied to a display device and comprising:

sorting inputted initial data voltages according to a pixel structure type of the display device to obtain a plurality of channels of data, each channel of the data comprising initial data voltages corresponding to all data lines when a gate line in a row corresponding to the channel is turned on;

outputting a plurality of sets of comparison data according to the plurality of channels of data, each set of the comparison data comprising an actual data voltage on a data line when a gate line in a row immediately preceding a current row is turned on, and an initial data voltage on the same data line when the gate line in the current row is turned on;

looking up, based on each of the sets of comparison data, actual compensation data corresponding to the set of comparison data; and

compensating for, based on the actual compensation data, the initial data voltage on a data line corresponding to the actual compensation data when the gate line in the current row is turned on to obtain an actual data voltage on the data line when the gate line in the current row is turned on, and storing the actual data voltages on all the data lines when the gate line in the current row is turned on,

wherein the looking up, based on each of the sets of comparison data, the actual compensation data corresponding to the set of comparison data comprises:

looking up, based on each of the sets of comparison data, initial compensation data corresponding to the set of comparison data in a compensation initial data lookup table;

looking up, based on each of the sets of comparison data, a compensation gain corresponding to the set of comparison data in a gain lookup table; and

calculating the actual compensation data based on the initial compensation data and the compensation gain,

wherein the looking up, based on each of the sets of comparison data, the initial compensation data corresponding to the set of comparison data in the compensation initial data lookup table comprises:

determining an initial compensation data c corresponding to comparison data (a, b) according to the following formulas:

f

⁡

(

R

⁢

⁢

1

)

=

x

⁢

⁢

(

s

+

1

)

-

a

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

11

)

+

a

-

xs

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

21

)

f

⁡

(

R

⁢

⁢

2

)

=

x

⁢

⁢

(

s

+

1

)

-

a

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

12

)

+

a

-

xs

x

⁢

⁢

(

s

+

1

)

-

xs

⁢

f

⁡

(

Q

⁢

⁢

22

)

f

⁡

(

p

)

=

y

⁢

⁢

(

r

+

1

)

-

b

y

⁢

⁢

(

r

+

1

)

-

yr

⁢

f

⁡

(

R

⁢

⁢

1

)

+

b

-

yr

y

⁢

⁢

(

r

+

1

)

-

yr

⁢

f

⁡

(

R

⁢

⁢

2

)

where the comparison data (a, b) has a corresponding coordinate point in the compensation initial data lookup table, which is located in a region defined by coordinate points (xs, yr), (xs, y(r+1)), (x(s+1), yr), (x(s+1), y(r+1)); f(Q11) is a value corresponding to the coordinate point (xs, yr) in the compensation initial data lookup table, f(Q12) is a value corresponding to the coordinate point (xs, y(r+1)) in the compensation initial data lookup table, f(Q21) is a value corresponding to the coordinate point (x(s+1), yr) in the compensation initial data lookup table, and f(Q22) is a value corresponding to the coordinate point (x(s+1), y(r+1)) in the compensation initial data lookup table; and a value of f(p) is c.

13. The charge compensation method according to claim 12 , further comprising:

acquiring a pixel structure type of the display device.

14. The charge compensation method according to claim 12 , wherein the looking up, based on each of the sets of comparison data, the compensation gain corresponding to the set of comparison data in the gain lookup table comprises:

calculating a compensation gain corresponding to the comparison data (a, b) by using the following formulas:

f

⁡

(

G

⁢

⁢

1

)

=

e

⁢

⁢

2

-

e

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

11

)

+

e

-

e

⁢

⁢

1

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

21

)

f

⁡

(

G

⁢

⁢

2

)

=

e

⁢

⁢

2

-

e

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

12

)

+

e

-

e

⁢

⁢

1

e

⁢

⁢

2

-

e

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

22

)

f

⁡

(

G

)

=

f

⁢

⁢

2

-

f

f

⁢

⁢

2

-

f

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

1

)

+

f

-

f

⁢

⁢

1

f

⁢

⁢

2

-

f

⁢

⁢

1

⁢

f

⁡

(

G

⁢

⁢

2

)

where a pixel coordinate of a sub-pixel corresponding to the comparison data (a, b) is (e, f), which is located in a region defined by coordinate points (e1, f1), (e1, f2), (e2, f1), and (e2, f2); f(G11) is a compensation gain corresponding to the coordinate point (e1, f1), f(G12) is a compensation gain corresponding to the coordinate point (e1, f2), f(G21) is a compensation gain corresponding to the coordinate point (e2, f1), and f(G22) is a compensation gain corresponding to the coordinate point (e2, f2); and f(G) is g.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2022
From: BOE TECHNOLOGY GROUP CO., LTD.
To: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Reel/Frame 060666/0773 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2019
From: LYU, WENXU; WANG, XINQIU; DONG, XUE; CHEN, MING; SUN, WEI; LO, HSINCHUNG
To: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 050025/0527 →
Priority Claims (1)
CN 201910129059.3 · Feb 21, 2019 · national
Continuity (1)
Related Publication 20200273422A1 · Aug 27, 2020