Transistors, memory structures and memory arrays containing two-dimensional materials between a source/drain region and a channel region
Some embodiments include an integrated assembly having a semiconductor material with a more-doped region adjacent to a less-doped region. A two-dimensional material is between the more-doped region and a portion of the less-doped region. Some embodiments include an integrated assembly which contains a semiconductor material, a metal-containing material over the semiconductor material, and a two-dimensional material between a portion of the semiconductor material and the metal-containing material. Some embodiments include a transistor having a first source/drain region, a second source/drain region, a channel region between the first and second source/drain regions, and a two-dimensional material between the channel region and the first source; drain region.
1. A transistor, comprising:
a first source/drain region;
a second source/drain region;
a channel region between the first and second source/drain regions; and
a two-dimensional material between the channel region and the first source/drain region, the two-dimensional material comprising one or more material selected from the group consisting of carbon, boron, tin, bismuth, molybdenum, platinum, tungsten and hafnium.
2. The transistor of claim 1 wherein the two-dimensional material comprises a stack comprising 1 to 10 separate layers.
3. The transistor of claim 1 wherein the two-dimensional material comprises a thickness within a range of from about 0.5 nm to about 5 nm.
4. The transistor of claim 1 wherein the first source/drain region is directly against the two-dimensional material.
5. The transistor of claim 1 wherein the first source/drain region is spaced from the two-dimensional material.
6. The transistor of claim 1 wherein the two-dimensional material is a first two-dimensional material, and further comprising a second two-dimensional material between the second source/drain region and the channel region.
7. The transistor of claim 6 further comprising a third two-dimensional material in the channel region.
8. The transistor of claim 1 wherein the two-dimensional material further comprises one or more phosphorous, germanium and silicon.
9. The transistor of claim 1 wherein the two-dimensional material comprises molybdenum.
10. The transistor of claim 1 wherein the two-dimensional material comprises molybdenum disulfide and/or molybdenum diselenide.
11. A memory structure comprising the transistor of claim 1 , the memory structure including a storage-element coupled with one of the first and second source/drain regions, and including a digit line coupled with the other of the first and second source/drain regions.
12. The memory structure of claim 11 wherein the storage element is a capacitor.
13. A memory array comprising the memory structure of claim 11 .
14. A transistor, comprising:
a first source/drain region;
a second source/drain region;
a channel region between the first and second source/drain regions the first source/drain region, the second source/drain region and the channel region extend within a semiconductor material; and
a two-dimensional material between the channel region and the first source/drain region.
15. The transistor of claim 14 wherein the semiconductor material is a polycrystalline material.
16. The transistor of claim 14 wherein the semiconductor material comprises polycrystalline silicon.
17. The transistor of claim 14 wherein the two-dimensional material is a first two-dimensional region in a first part of a barrier region; wherein the barrier region further comprises a second part which is spaced from the first part by an intervening region of the semiconductor material; and wherein the second part comprises an additional two-dimensional region.
18. A transistor, comprising:
a first source/drain region;
a second source/drain region;
a channel region between the first and second source/drain regions; and
a first two-dimensional material between the channel region and the first source/drain region; and
a metal-containing material adjacent the first source/drain region and spaced from the first source/drain region by a second two-dimensional material.
19. The transistor of claim 18 wherein the metal-containing material is a metal silicide.