Substrate bonding apparatus, substrate pairing apparatus, and semiconductor device manufacturing method

1. A substrate bonding apparatus, comprising:

a first semiconductor wafer holder configured to hold a semiconductor wafer selected from a first semiconductor wafer group;

a second semiconductor wafer holder arranged opposite to the first semiconductor wafer holder, and configured to hold a semiconductor wafer selected from a second semiconductor wafer group; and

a controller configured to control lamination bonding of the semiconductor wafers held by the first semiconductor wafer holder and the second semiconductor wafer holder,

wherein the controller is configured to:

calculate a matching rate of grid shapes between each semiconductor wafer of the first semiconductor wafer group and each semiconductor wafer of the second semiconductor wafer group,

generate pairing information, into which combinations of the semiconductor wafers used in the calculation of matching rates are registered when the matching rates fall within a predetermined range,

select a first semiconductor wafer to be held by the first semiconductor wafer holder from the first semiconductor wafer group, and

select a second semiconductor wafer from the semiconductor wafers of the second semiconductor wafer group that are paired with the first semiconductor wafer, with reference to the pairing information,

wherein, in the calculation of the matching rate, the controller is further configured to calculate a matching rate between two pieces of grid data by image processing using the grid data as an image.

2. The substrate bonding apparatus according to claim 1 , wherein, before the calculation of the matching rate, the controller is further configured to:

acquire a substrate measurement result by measuring positions of predetermined patterns on each semiconductor wafer, and

generate the grid data, which is data formed by connecting the predetermined patterns on each semiconductor wafer by straight lines, based on the substrate measurement result, and

in the calculation of the matching rate, the generated grid data is used.

3. The substrate bonding apparatus according to claim 2 , wherein, in the calculation of the matching rate, when the grid data is expressed by an absolute position coordinate system using a predetermined position on each semiconductor wafer as a reference, the controller is further configured to calculate a matching rate between the two pieces of grid data by using a predetermined algorithm, based on a positional deviation of the predetermined patterns between two semiconductor wafers corresponding to the two pieces of grid data.

4. The substrate bonding apparatus according to claim 1 , wherein the pairing information generated by the controller correlates one semiconductor wafer of the first semiconductor wafer group with a plurality of semiconductor wafers of the second semiconductor wafer group.

5. A substrate pairing apparatus, comprising:

a first semiconductor wafer holder configured to hold a semiconductor wafer selected from a first semiconductor wafer group;

a second semiconductor wafer holder arranged opposite to the first semiconductor wafer holder, and configured to hold a semiconductor wafer selected from a second semiconductor wafer group; and

a controller configured to control pairing of the semiconductor wafers held by the first semiconductor wafer holder and the second semiconductor wafer holder,

wherein the controller is configured to:

calculate a matching rate of grid shapes between each semiconductor wafer of the first semiconductor wafer group and each semiconductor wafer of the second semiconductor wafer group,

generate pairing information, into which combinations of the semiconductor wafers used in the calculation of matching rates are registered when the matching rates fall within a predetermined range,

select a first semiconductor wafer to be held by the first semiconductor water holder from the first semiconductor wafer group, and

select a second semiconductor wafer from the semiconductor wafers of the second semiconductor wafer group that are paired with the first semiconductor wafer, with reference to the pairing information,

wherein, in the calculation of the matching rate, the controller is further configured to calculate a matching rate between two pieces of grid data by image processing using the grid data as an image.

6. The substrate pairing apparatus according to claim 5 , wherein, before the calculation of the matching rate, the controller is further configured to:

acquire a substrate measurement result by measuring positions of predetermined patterns on each semiconductor wafer, and

generate the grid data, which is data formed by connecting the predetermined patterns on each semiconductor water by straight lines, based on the substrate measurement result, and

in the calculation of the matching rate, the generated grid data is used.

7. The substrate pairing apparatus according to claim 6 , wherein, in the calculation of the matching rate, when the grid data is expressed by an absolute position coordinate system using a predetermined position on each semiconductor wafer as a reference, the controller s further configured to calculate a matching rate between the two pieces of grid data by using a predetermined algorithm, based on a positional deviation of the predetermined patterns between two semiconductor wafers corresponding to the two pieces of grid data.

8. The substrate pairing apparatus according to claim 5 , wherein the pairing information generated by the controller correlates one semiconductor wafer of the first semiconductor wafer group with a plurality of semiconductor wafers of the second semiconductor wafer group.

9. A semiconductor device manufacturing method, comprising:

calculating a matching rate of grid shapes between each semiconductor water of a first semiconductor water group and each semiconductor wafer of a second semiconductor wafer group;

generating pairing information, into which combinations of semiconductor wafers used in the calculation of matching rates are registered when the matching rates fall within a predetermined range;

selecting a first semiconductor wafer from the first semiconductor wafer group;

selecting a second semiconductor wafer from semiconductor wafers of the second semiconductor wafer group that are paired with the first semiconductor wafer, with reference to the pairing information;

holding the first semiconductor wafer and the second semiconductor wafer by a first substrate holder and a second substrate holder arranged opposite to the first semiconductor wafer holder, respectively, in a substrate bonding apparatus; and

laminating and bonding the first semiconductor wafer and the second semiconductor wafer to each other through an adhesive layer,

wherein, before the calculating of the matching rate the method further comprises acquiring a substrate measurement result by measuring positions of predetermined patterns on each semiconductor wafer, and generating grid data, which is data formed by connecting the predetermined patterns on each semiconductor wafer by straight lines, based on the substrate measurement result;

in the calculating the matching rate, the generated rid data is used; and

in the calculating of the matching rate, a matching rate between two pieces of grid data is calculated by image processing using the generated grid data as an image.

10. The semiconductor device manufacturing method according to claim 9 , wherein, in the calculating of the matching rate, when the grid data is expressed by an absolute position coordinate system using a predetermined position on each semiconductor wafer as a reference, a matching rate between the two pieces of grid data is calculated by using a predetermined algorithm, based on a positional deviation of the predetermined patterns between two semiconductor wafers corresponding to the two pieces of grid data.

11. The semiconductor device manufacturing method according to claim 9 , wherein the pairing information correlates one semiconductor wafer of the first semiconductor wafer group with a plurality of semiconductor wafers of the second semiconductor wafer group.

12. The semiconductor device manufacturing method according to claim 9 , wherein

each semiconductor wafer belonging to the first semiconductor wafer group is a semiconductor wafer with a memory cell layer arranged on a first face, and

each semiconductor wafer belonging to the second semiconductor wafer group is a semiconductor wafer with a peripheral circuit layer, which includes circuits for driving memory cells included in the memory cell layer, arranged on a second face.

13. The semiconductor device manufacturing method according to claim 9 , wherein, before the laminating and bonding of the first semiconductor wafer and the second semiconductor wafer, the method further comprises:

determining whether a correction is necessary; and

performing the correction that is determined necessary, by moving the first substrate holder or the second substrate holder in a direction to correct a positional deviation, magnification deviation, or rotational deviation between the first substrate holder and the second substrate holder.

14. A semiconductor device manufacturing method, comprising:

calculating a matching rate of grid shapes between each semiconductor wafer of a first semiconductor wafer group and each semiconductor wafer of a second semiconductor wafer group;

generating pairing information, into which combinations of semiconductor wafers used in the calculation of matching rates are registered when the matching rates fall within a predetermined range;

selecting a first semiconductor wafer from the first semiconductor wafer group;

selecting a second semiconductor wafer from semiconductor wafers of the second semiconductor wafer group that are paired with the first semiconductor wafer, with reference to the pairing information;

holding the first semiconductor wafer and the second semiconductor wafer by a first substrate holder and a second substrate holder arranged opposite to the first semiconductor wafer holder, respectively, in a substrate bonding apparatus; and

laminating and bonding the first semiconductor wafer and the second semiconductor wafer to each other through an adhesive layer,

wherein before the calculating of the matching rate, the method further comprises

acquiring a substrate measurement result by measuring positions of predetermined patterns on each semiconductor wafer, and

generating grid data, which is data formed by connecting the predetermined patterns on each semiconductor wafer by straight lines, based on the substrate measurement result;

in the calculating of the matching rate, the generated grid data is used; and

wherein the grid data is generated by detecting a mark of a first shot region, among marks at centers of respective shot regions provided on each semiconductor wafer, further detecting a mark of a second shot region adjacent to the first shot region in one of a first direction and a second direction orthogonal to each other, and connecting the marks thus detected by a straight line.

15. The semiconductor device manufacturing method according to claim 9 , wherein the first semiconductor wafer or the second semiconductor wafer is in a state prepared by lamination bonding of a plurality of semiconductor wafers in advance.

16. The semiconductor device manufacturing method according to claim 9 , wherein, in the selecting of the second semiconductor wafer from semiconductor wafers of the second semiconductor wafer group that are paired with the first semiconductor wafer, the second semiconductor wafer having a highest matching rate, or selecting the second semiconductor wafer at random, in the pairing information is selected.