CHARGE CARRIER TRANSPORT FACILITATED BY STRAIN
A semiconductor structure and formation thereof. The semiconductor structure has a semiconductor channel region composed of a first semiconductor material that (i) is epitaxial with and (ii) is lattice-matched with a second semiconductor material. The semiconductor structure has, at a first end of the semiconductor channel region, a first source/drain region composed of a third semiconductor material that is lattice-mismatched to both the first semiconductor material and the second semiconductor material.
1 . A method of forming a semiconductor structure comprising:
forming a semiconductor channel region from a first semiconductor material that (i) is epitaxial with and (ii) is lattice-matched with a second semiconductor material; and
forming, at a first end of the semiconductor channel region, a first source/drain region from a third semiconductor material that is lattice-mismatched to both the first semiconductor material and the second semiconductor material.
2 . The method of claim 1 further comprising:
etching a region of first semiconductor material to a depth that, at least, exposes a region of the second semiconductor material.
3 . The method of claim 2 , wherein the etching includes an isotropic etch.
4 . The method of claim 1 further comprising:
fabricating a gate structure on top of a segment of the first semiconductor material.
5 . The method of claim 1 , wherein one or both of the first semiconductor material and the third semiconductor material are further comprised of compound semiconductors.
6 . The method of claim 1 , wherein one or both of the first semiconductor material and the third semiconductor material are further comprised of III-V semiconductors.
7 . The method of claim 1 , wherein one or both of the first semiconductor material and the third semiconductor material include indium.
8 . The method of claim 1 , wherein one or both of the first semiconductor material and the third semiconductor material are further comprised of alloys of indium arsenide and gallium arsenide.
9 . The method of claim 1 , wherein the first semiconductor material is comprised of In 0.53 Ga 0.47 As.
10 . The method of claim 1 , wherein the third semiconductor material is comprised of In y Ga (1-y) As.
11 . The method of claim 10 , wherein y has a range between 0 and approximately 0.53.
12 . The method of claim 10 , wherein y has a range between approximately 0.53 and 1.
13 . The method of claim 1 , the method further comprising:
forming a layer of the first semiconductor material on top of a layer of the second semiconductor material.
14 . The method of claim 1 , the method further comprising:
forming, at a second end of the semiconductor channel region, a second source/drain region.
15 . The method of claim 1 , wherein the second end of the semiconductor channel region is formed from the third semiconductor material.
16 . The method of claim 14 , the method further comprising:
fabricating a gate structure on top of the semiconductor channel region such that the gate structure is between the first source/drain region and the second source/drain region.
17 . The method of claim 14 , wherein at least a portion of the first semiconductor material is between the first source/drain region and the second source/drain region.
18 . The method of claim 1 , wherein at least part of the first semiconductor material has a degree of uniaxial strain that is based, at least in part, on a difference between a lattice structure of the first semiconductor material and a lattice structure of the third semiconductor material.
19 . The method of claim 1 , wherein the third semiconductor material that is a ternary semiconductor material.
20 . A semiconductor structure comprising:
a semiconductor channel region composed of a first semiconductor material that (i) is epitaxial with and (ii) is lattice-matched with a second semiconductor material; and
at a first end of the semiconductor channel region, a first source/drain region composed of a third semiconductor material that is lattice-mismatched to both the first semiconductor material and the second semiconductor material.