IP Library Granted Patent US 10,903,154
Granted Patent B2
US 10,903,154 · App. 16/545,164 · Granted Jan 26, 2021

Semiconductor device and method of forming cantilevered protrusion on a semiconductor die

Inventors: Francis J. Carney (Mesa, AZ); Michael J. Seddon (Gilbert, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/49827H01L21/02035H01L21/288H01L21/304H01L21/308H01L21/3065H01L21/3083H01L21/486H01L21/4825H01L21/4853H01L21/565H01L21/67069H01L21/6835H01L21/76877H01L21/76898H01L21/78H01L22/12H01L22/26H01L23/3107H01L23/3114H01L23/481H01L23/4822H01L23/4951H01L23/49503H01L23/49541H01L23/49562H01L23/49575H01L23/49811H01L23/49838H01L23/49866H01L23/544H01L23/562H01L24/00H01L24/05H01L25/0655H01L25/0657H01L25/50H01L27/0207H01L27/088H01L27/14H01L27/14683H01L29/0847H02M3/158H01L23/147H01L23/15H01L23/3677H01L23/49816H01L27/14625H01L27/14685H01L2221/68327H01L2223/5446H01L2223/54426H01L2224/0401H01L2224/04042H01L2224/05083H01L2224/05084H01L2224/05124H01L2224/05139H01L2224/05144H01L2224/05147H01L2224/05155H01L2224/05164H01L2224/05166H01L2224/05171H01L2224/05172H01L2224/05184H01L2224/13025H01L2224/13111H01L2224/13116H01L2225/06555H01L2225/06593H01L2225/06596H01L2924/13055H01L2924/13091H01L2924/3511
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Quick Facts
Patent No.
US 10,903,154
App. No.
16/545,164
Granted
Jan 26, 2021
Kind
B2
Abstract

A semiconductor device has a first semiconductor die with a base material. A covering layer is formed over a surface of the base material. The covering layer can be made of an insulating material or metal. A trench is formed in the surface of the base material. The covering layer extends into the trench to provide the cantilevered protrusion of the covering layer. A portion of the base material is removed by plasma etching to form a cantilevered protrusion extending beyond an edge of the base material. The cantilevered protrusion can be formed by removing the base material to the covering layer, or the cantilevered protrusion can be formed within the base material under the covering layer. A second semiconductor die is disposed partially under the cantilevered protrusion. An interconnect structure is formed between the cantilevered protrusion and second semiconductor die.

Claims (29)

1. A method of making a semiconductor device, comprising:

providing a first semiconductor die;

forming a covering layer over a surface of the first semiconductor die;

forming a trench in a semiconductor material of the first semiconductor die; and

forming the covering layer into the trench;

wherein the covering layer extends outside the first semiconductor die to form a cantilevered protrusion of the first semiconductor die.

2. The method of claim 1 , wherein the covering layer is made of an insulating material or metal.

3. The method of claim 1 , wherein the cantilevered protrusion blocks material from migrating onto a side surface of the first semiconductor die.

4. The method of claim 1 , further comprising removing a portion of the semiconductor material under the covering layer to form the cantilevered protrusion of the first semiconductor die.

5. The method of claim 1 , further comprising forming the cantilevered protrusion to include a semiconductor material of the first semiconductor die.

6. The method of claim 1 , further comprising disposing a second semiconductor die partially under the cantilevered protrusion.

7. A semiconductor device, comprising:

a first semiconductor die;

a covering layer defined by a shape of a trench formed in the first semiconductor die, the covering layer extending over a surface of the first semiconductor die protruding beyond the first semiconductor die to form a cantilevered protrusion of the first semiconductor die.

8. The semiconductor device of claim 7 , wherein the covering layer is made of an insulating material or metal.

9. The semiconductor device of claim 7 , further comprising a second semiconductor die disposed partially under the cantilevered protrusion.

10. The semiconductor device of claim 7 , further comprising a material disposed over the surface of the first semiconductor die, wherein the cantilevered protrusion blocks the material from migrating onto a side surface of the first semiconductor die.

11. The semiconductor device of claim 7 , further comprising a conductive layer formed over the covering layer.

12. The semiconductor device of claim 7 , further comprising removing a portion of a semiconductor material under the covering layer to form the cantilevered protrusion of the first semiconductor die.

13. The semiconductor device of claim 7 , wherein the cantilevered protrusion includes a semiconductor material of the first semiconductor die.

14. A semiconductor device, comprising:

a first semiconductor die, wherein a portion of the first semiconductor die forms a cantilevered protrusion; and

a material disposed over a surface of the first semiconductor die, wherein the cantilevered protrusion is configured to prevent the material from migrating onto a side surface of the first semiconductor die.

15. The semiconductor device of claim 14 , further comprising a covering layer formed over the first semiconductor die.

16. The semiconductor device of claim 15 , wherein the covering layer is made of an insulating material or metal.

17. The semiconductor device of claim 15 , further comprising a conductive layer formed over the covering layer.

18. The semiconductor device of claim 15 , wherein a portion of the cantilevered protrusion of the first semiconductor die is included in a trench formed in the first semiconductor die.

19. The semiconductor device of claim 14 , further comprising a second semiconductor die disposed partially under the cantilevered protrusion.

20. The semiconductor device of claim 19 , further comprising an electrical interconnect disposed between the first semiconductor die and the second semiconductor die.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 051145, FRAME 0062 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064079/0474 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXCLUSION OF FAIRCHILD SEMICONDUCTOR CORPORATION OF CONVEYING PARTY PREVIOUSLY RECORDED ON REEL 051145 FRAME 0062. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Dec 3, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051170/0781 →
SECURITY INTEREST Recorded Nov 26, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051145/0062 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2019
From: CARNEY, FRANCIS J.; SEDDON, MICHAEL J.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 050098/0552 →