IP Library Granted Patent US 11,108,227
Granted Patent B2
US 11,108,227 · App. 16/545,211 · Granted Aug 31, 2021

Methods and apparatus for a battery

Inventors: Atsushi Kamei (Maebashi, JP); Yasuaki Hayashi (Oura-Gun, JP); Katsumi Yamamoto (Kokubunji, JP)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H02H7/18H01M10/425H01M10/48H02H3/006
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Quick Facts
Patent No.
US 11,108,227
App. No.
16/545,211
Granted
Aug 31, 2021
Kind
B2
Abstract

A battery apparatus according to various aspects of the present invention may operate in conjunction with a power source, such as a battery. The battery apparatus may include a protection IC, a first terminal, a second terminal, and a third terminal. The power source may be selectively coupled to the battery apparatus at the second and third terminals. The power source may be capable of providing a current through the battery apparatus via one of a first current loop and a second current loop.

Claims (55)

1. A battery apparatus having a first terminal, a second terminal, and a third terminal, comprising:

an integrated circuit connected to the first, second, and third terminals;

a first current path from the first terminal, across the integrated circuit, through a resistor, and to the second terminal;

a second current path from the first terminal, across the integrated circuit, and to the third terminal, wherein the second current path bypasses the resistor; and

a switch selectively connected to the second and third terminals.

2. The battery apparatus according to claim 1 , wherein the first terminal is configured to connect to a positive terminal of a power source.

3. The battery apparatus according to claim 1 , wherein the second and third terminals are configured to selectively connect to a negative terminal of a power source.

4. The battery apparatus according to claim 1 , wherein the resistor comprises:

a first end connected to the second terminal; and

a second end connected to the third terminal.

5. The battery apparatus according to claim 4 , wherein the second end of the resistor is also connected to the integrated circuit.

6. The battery apparatus according to claim 1 , wherein the battery apparatus is further configured to receive a signal from a pulse generator at a fourth terminal.

7. The battery apparatus according to claim 1 , wherein the battery apparatus is further configured to connect to an external current source at a fifth terminal.

8. A method for operating a battery system having a first terminal, a second terminal, a third terminal and a power supply, comprising:

generating a first current through a first current loop, wherein the first current flows:

from a positive terminal of the power supply to the first terminal;

from the first terminal, across a resistor, and to the second terminal; and

from the second terminal to a negative terminal of the power supply;

generating a second current through a second current loop, wherein the second current flows:

from the positive terminal of the power supply to the first terminal;

from the first terminal to the third terminal; and

from the third terminal to the negative terminal of the power supply;

wherein the second current loop bypasses the resistor.

9. The method according to claim 8 , further comprising disconnecting the power supply from the second terminal with a switch.

10. The method according to claim 9 , further comprising connecting the power supply to the third terminal with the switch.

11. The method according to claim 8 , wherein the resistor comprises:

a first end connected to the second terminal; and

a second end connected to the third terminal.

12. The method according to claim 8 , wherein the first and second currents flow through an integrated circuit having a protection function to monitor at least one of a voltage, the first current, and the second current.

13. A system, comprising:

a power supply comprising a positive terminal and a negative terminal;

a control circuit, connected to the power supply, comprising:

a first terminal, a second terminal, and a third terminal;

a protection circuit connected to the first, second, and third terminals;

a resistor connected to the second and third terminals;

wherein the control circuit is:

connected to the positive terminal of the power supply via the first terminal; and

selectively connected to the negative terminal of the power supply via one of: the second terminal and the third terminal;

a first current loop comprising: the power supply, the first terminal, the protection circuit, the resistor, and the second terminal; and

a second current loop comprising: the power supply, the first terminal, the protection circuit, and the third terminal, wherein the second current loop bypasses the resistor.

14. The system according to claim 13 , wherein the resistor comprises:

a first end connected to the second terminal; and

a second end connected to the third terminal.

15. The system according to claim 14 , wherein the second end of the resistor is also connected to the protection circuit.

16. The system according to claim 13 , wherein the control circuit is further configured to receive a signal from a pulse generator at a fourth terminal.

17. The system according to claim 13 , wherein the control circuit is further configured to connect to an external current source at a fifth terminal.

18. The system according to claim 13 , further comprising a switch connected to the negative terminal of the power supply and configured to selectively connect the negative terminal to the second terminal and the third terminal.

19. The system according to claim 13 , wherein the first current loop is configured to flow a first current:

from the positive terminal of the power supply to the first terminal;

from the first terminal, through the protection circuit, across a resistor, and to the second terminal; and

from the second terminal to the negative terminal of the power supply.

20. The system according to claim 13 , wherein the second current loop is configured to flow a second current:

from the positive terminal of the power supply to the first terminal;

from the first terminal, through the protection circuit, and to the third terminal; and

from the third terminal to the negative terminal of the power supply.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 051145, FRAME 0062 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064079/0474 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXCLUSION OF FAIRCHILD SEMICONDUCTOR CORPORATION OF CONVEYING PARTY PREVIOUSLY RECORDED ON REEL 051145 FRAME 0062. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Dec 3, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051170/0781 →
SECURITY INTEREST Recorded Nov 26, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051145/0062 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2019
From: KAMEI, ATSUSHI; HAYASHI, YASUAKI; YAMAMOTO, KATSUMI
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 050100/0214 →