IP Library Granted Patent US 50,067
Granted Patent E1
US 50,067 · App. 16/545,549 · Granted Jul 30, 2024

Storage device including flash memory and capable of predicting storage device performance based on performance parameters

Inventor: Akihisa Fujimoto (Kanagawa, JP)
Assignee: KIOXIA CORPORATION
G06F3/0613G06F3/061G06F3/0632G06F3/0634G06F3/0679G06F12/0246G06F13/385G11C16/20G06F2206/1014
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Quick Facts
Patent No.
US 50,067
App. No.
16/545,549
Granted
Jul 30, 2024
Kind
E1
Abstract

A storage device includes a semiconductor memory storing data. A controller instructs to write data to the semiconductor memory in accordance with a request the controller receives. A register holds performance class information showing one performance class required to allow the storage device to demonstrate best performance which the storage device supports, of performance classes specified in accordance with performance.

Claims (50)

1. A host device which communicates with a storage device, comprising:

a semiconductor memory which has memory areas, a part of the memory areas being assigned to a user area which can be accessed from outside, the user area including allocation units (AUs), each AU including recording units (RUs);

a controller instructing to write data to the semiconductor memory in accordance with a request from the host device;

a register provided in the controller, holding a class value corresponding to a performance class of the storage device and holding information of a size of an AU, the size of the AU being memory management information used to manage the user area, wherein

a worst average write performance of the storage device, which is an average of measured sequential writes performance not including file system information writes, is larger than or equal to performance specified by the class value held in the register,

a write size of each of the sequential writes is a size of one or more of the RUs,

the host device reads the class value from the storage device and requests sequential writes to the storage device while updating file system information in the storage device at an interval of a first period,

the host device comprises a buffer which receives write data for a period at a first rate and outputs data for a second period shorter than the first period at a second rate higher than the first rate, and

the host device controls the first rate or the first period to avoid an overflow of data from the buffer.

2. The device according to claim 1 , wherein

the host device updates the file system information for a third period, which is equal to the first period minus the second period.

3. The device according to claim 1 , wherein

the host device updates the file system information at an interval of the first period.

4. The device according to claim 1 , wherein

the host device is able to access the register.

5. A host device which communicates with a storage device, comprising:

a semiconductor memory which has memory areas, a part of the memory areas being assigned to a user area which can be accessed from outside, the user area including allocation units (AUs), each AU including recording units (RUs);

a controller instructing to write data to the semiconductor memory in accordance with a request from the host device;

a register provided in the controller, holding a class value corresponding to a performance class of the storage device and holding information of a size of an AU, the size of the AU being memory management information used to manage the user area, wherein

a worst average write performance of the storage device, which is an average of measured sequential writes performance not including file system information writes, is larger than or equal to performance specified by the class value held in the register,

a write size of each of the sequential writes is a size of one or more of the RUs,

the host device reads the class value from the storage device and requests sequential writes to the storage device while updating file system information in the storage device at an interval of a first period, and

the host device controls a first rate requested from an application in the hot device or the first period to allow the storage device to write data received from the host device with the performance specified by the class value within a second period shorter than the first period.

6. The device according to claim 5 , wherein

the host device updates the file system information for a third period, which is equal to the first period minus the second period.

7. The device according to claim 5 , wherein

the host device updates the file system information at an interval of the first period.

8. The device according to claim 5 , wherein

the host device is able to access the register.

9. A host device which is connectable to a control bus and communicates with a storage device, the host device comprising:

a controller configured to make a data exchange with the storage device, and

a buffer connected to the controller and configured to temporarily hold data for the storage device,

wherein the controller is configured to read a class value corresponding to a performance class of the storage device, request sequential writes to the storage device while updating file system information in the storage device at an interval of a first period, and control a first rate requested from an application in the host device or the first period to allow the storage device to write data received from the host device with the performance specified by the class value within a second period shorter than the first period.

10. The host device according to claim 9 , wherein

a third period of the updating of the file system information is equal to the first period minus the second period.

11. The host device according to claim 10 , wherein

the third period of the updating of the file system information is defined as a total time of file system write cycle, which includes a total write time of FAT and DIR.

12. The host device according to claim 10 , wherein

the controller is configured to access a register provided in a controller of the storage device and reads information of performance of the storage device.

13. The host device according to claim 9 , wherein

the updating of the file system information is inserted into the sequential writes.

14. The host device according to claim 13 , wherein

the host device calculates a reduction of actual performance by influence that the updating of the file system information is inserted into the sequential writes.

15. The host device according to claim 12 , wherein

the information of the performance of the storage device includes the class value corresponding to the performance class of the storage device.

16. The host device according to claim 9 , wherein

the first rate is controlled by the application to allow the storage device to write data received from the host device with the performance specified by the class value within the second period shorter than the first period.

17. The host device according to claim 16 , wherein the controller controls the first period.

18. The host device according to claim 16 , wherein the buffer is configured to receive the data and output the data to outside of the host device.

19. The host device according to claim 9 , wherein the buffer is configured to receive the data and output the data to outside of the host device.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Sep 7, 2021
From: TOSHIBA MEMORY CORPORATION; K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 057426/0778 →
CHANGE OF NAME Recorded Sep 7, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 057426/0836 →