Semiconductor device with air spacer and method for preparing the same
The present disclosure provides a semiconductor device and a method for preparing the semiconductor device. The method includes forming a first conductive layer over a substrate, forming a first dielectric structure over the first conductive layer, transforming a sidewall portion of the first conductive layer into a first transformed portion, removing the first transformed portion such that a width of the first dielectric structure is greater than a width of a remaining portion of the first conductive layer, and forming an inter-layer dielectric (ILD) layer covering sidewalls of the first dielectric structure such that a first air spacer is formed between the ILD layer and the remaining portion of the first conductive layer.
1. A semiconductor device, comprising:
a plurality of composite pillars disposed over a substrate, wherein the composite pillars include conductive pillars and dielectric caps over the conductive pillars;
a first air spacer at one side of the conductive pillar and a second air spacer at the other side of the conductive pillar, wherein a first shape of the first air spacer is different from a second shape of the second air spacer;
a supporting pillar between adjacent two of the plurality of composite pillars; and
a sealing layer at least contacts a top portion of the supporting pillar and a top of the dielectric cap, and air spacers are formed between the sealing layer, the supporting pillar and the remaining portions of the conductive pillars.
2. The semiconductor device of claim 1 , wherein a top end of the supporting pillar is horizontally aligned with a top end of the dielectric cap.
3. The semiconductor device of claim 1 , wherein a width of the conductive pillar is smaller than a width of the dielectric cap.
4. The semiconductor device of claim 1 , wherein the sealing layer has an intervening portion contacting the top portion of the supporting pillar and the top portion of the dielectric cap, and the intervening portion has a bottom end lower than a bottom end of the dielectric cap.
5. The semiconductor device of claim 1 , wherein the sealing layer has an intervening portion contacting the top portion of the supporting pillar and the top portion of the dielectric cap, and the intervening portion has a bottom end higher than a bottom end of the dielectric cap.
6. The semiconductor device of claim 1 , wherein a top end of the supporting pillar is higher than a bottom end of the dielectric cap.
7. The semiconductor device of claim 1 , wherein a top end of the supporting pillar is higher than a top end of the conductive pillar.
8. A semiconductor device, comprising:
a plurality of composite pillars disposed over a substrate, wherein the composite pillars include conductive pillars and dielectric caps over the conductive pillars;
a first air spacer at one side of the conductive pillar and a second air spacer at the other side of the conductive pillar, wherein a first size of the first air spacer is different from a second size of the second air spacer;
a supporting pillar between adjacent two of the plurality of composite pillars; and
a sealing layer at least contacts a top portion of the supporting pillar and a top of the dielectric cap, and air spacers are formed between the sealing layer, the supporting pillar and the remaining portions of the conductive pillars.
9. The semiconductor device of claim 8 , wherein the first air spacer is between the supporting pillar and the conductive pillar, the second air spacer is at the other side of the conductive pillar, and the first air spacer is larger than the second air spacer.