Pixel circuit and method for controlling the same, and flat panel detector

1. A pixel circuit, comprising:

a plurality of pixel units arranged in an M×N array, wherein each of the pixel units is configured to sense an optical signal and generate induced current based on the sensed optical signal, where M and N are integers greater than or equal to 1; and

N storage circuits connected to N columns of pixel units respectively, wherein each of the storage circuits has an input signal terminal connected to a respective column of pixel units, a control signal terminal and an output signal terminal, and is configured to receive induced current from the respective column of pixel units at the input signal terminal, store a voltage based on the received induced current, and provide the stored voltage at the output signal terminal under control of a signal at the control signal terminal;

wherein each of the storage circuits comprise a first storage sub-circuit and a first second store sub-circuit, and the control signal terminal comprises a first storage control signal terminal, a second storage control signal terminal, a first output control signal terminal, and a second output control signal terminal;

wherein the first storage sub-circuit comprises a second capacitor, a third transistor, and a fourth transistor, wherein the third transistor has a gate connected to the first storage control signal terminal, a first electrode connected to the input signal terminal, and a second electrode connected to a first terminal of the second capacitor; the second capacitor has a second terminal connected to a reference signal terminal; and the fourth transistor has a gate connected to the first output control signal terminal, a first electrode connected to the first terminal of the second capacitor, and a second electrode connected to the output signal terminal;

wherein the second storage sub-circuit comprises a third capacitor, a fifth transistor, and a sixth transistor, wherein the fifth transistor has a gate connected to the second storage control signal terminal, a first electrode connected to the input signal terminal, and a second electrode connected to a first terminal of the third capacitor; the third capacitor has a second terminal connected to the reference signal terminal; and the sixth transistor has a gate connected to the second output control signal terminal, a first electrode connected to the first terminal of the third capacitor, and a second electrode connected to the output signal terminal.

2. The pixel circuit according to claim 1 , wherein the storage circuit comprises:

a first capacitor having a first terminal connected to the input signal terminal, and a second terminal connected to a reference signal terminal; and

a first transistor having a gate connected to the control signal terminal, a first electrode connected to the first terminal of the first capacitor, and a second electrode connected to the output signal terminal.

3. The pixel circuit according to claim 1 , wherein the pixel unit comprises:

a photoelectric conversion circuit configured to sense the optical signal and generate induced current based on the sensed optical signal; and

an output transistor having a gate acting as a scanning signal terminal of the pixel unit, a first electrode connected to the photoelectric conversion circuit to receive the induced current generated by the photoelectric conversion circuit, and a second electrode acting as an output terminal of the pixel unit to output the induced current,

wherein scanning signal terminals of each row of pixel units in the M×N array are connected to each other to receive a scanning signal for the row of pixel units, and output terminals of each column of pixel units are connected to each other to output the induced current.

4. The pixel circuit according to claim 3 , wherein the pixel unit is an active pixel unit.

5. The pixel circuit according to claim 4 , wherein the photoelectric conversion circuit comprises a photodiode, an amplification transistor, and a fifth transistor, wherein

the photodiode has a first electrode connected to a reference signal terminal, and a second electrode connected to a gate of the amplification transistor;

the amplification transistor has a gate connected to a second electrode of the photodiode, a first electrode connected to a power supply signal terminal, and a second electrode connected to the first electrode of the output transistor; and

the fifth transistor has a gate connected to a reset signal terminal, a first electrode connected to the power supply signal terminal, and a second electrode connected to the second electrode of the photodiode.

6. A flat panel detector, comprising the pixel circuit according to claim 1 .

7. A method for controlling the pixel circuit according to claim 1 , comprising:

applying scanning signals to M rows of pixel units in the M×N array, so that a respective row of pixel units senses optical signals and generates induced current based on the sensed optical signals;

applying a control signal to a control signal terminal of each of the N storage circuits, so that the storage circuit receives induced current from a respective column of pixel units, stores a voltage based on the received induced current, and provides the stored voltage to an output signal terminal of the storage circuit under control of the control signal.

8. The method according to claim 7 , wherein each of the storage circuits comprises K storage sub-circuits, and the control signal terminal comprises K storage control signal terminals and K output control signal terminals, wherein a k th storage sub-circuit is connected to the input signal terminal, a k th storage control signal terminal, a k th output control signal terminal, and the output signal terminal,

wherein,

during the generation of induced current by an m th row of pixel units, the k th storage sub-circuit in each of the storage circuits receives induced current from a respective column of pixel units, and stores a voltage based on the received induced current under control of a signal at the k th storage control signal terminal; and

during the generation of induced current by an (m+i) th row of pixel units, a (k+i) th storage sub-circuit in each of the storage circuits receives induced current from a respective column of pixel units, and stores a voltage based on the received induced current under control of the signal at the (k+i) th storage control signal terminal, and the k th storage sub-circuit in each of the storage circuits provides the stored voltage to the output signal terminal of the storage circuit under control of a signal at the k th output control signal terminal,

where m, k and i are positive integers, 1≤m+i≤M, and 1≤k+i≤K.