Optical cladding layer design
Embodiments of the invention describe apparatuses, optical systems, and methods related to utilizing optical cladding layers. According to one embodiment, a hybrid optical device includes a silicon semiconductor layer and a III-V semiconductor layer having an overlapping region, wherein a majority of a field of an optical mode in the overlapping region is to be contained in the III-V semiconductor layer. A cladding region between the silicon semiconductor layer and the III-V semiconductor layer has a spatial property to substantially confine the optical mode to the III-V semiconductor layer and enable heat dissipation through the silicon semiconductor layer.
1. An semiconductor device with a waveguide, comprising:
a cladding layer defining a longitudinal direction transverse to a surface of the cladding layer and a lateral direction parallel to the cladding layer, the cladding layer having a thinner lateral region and a thicker lateral region;
a silicon semiconductor layer positioned on another surface of the cladding layer opposite the surface of the cladding layer; and
a III-V semiconductor layer positioned on the surface the cladding layer, the III-V semiconductor layer having an active region with light confined in the III-V semiconductor layer by the thicker lateral region of the cladding layer.
2. The semiconductor device of claim 1 , wherein the III-V semiconductor layer includes a further thicker lateral region and a further thinner lateral region, the further thicker lateral region is positioned longitudinally adjacent to at least a portion of the thicker lateral region of the cladding layer.
3. The semiconductor device of claim 2 , wherein the further thinner region of the III-V semiconductor layer is positioned longitudinally adjacent to the thinner region of the cladding layer.
4. The semiconductor device of claim 1 , wherein the III-V semiconductor layer extends laterally beyond the thicker lateral region of the cladding layer.
5. The semiconductor device of claim 1 , wherein the silicon semiconductor layer has an additional thinner lateral region and an additional thicker lateral region, the additional thicker lateral region being thicker than the additional thinner lateral region.
6. The semiconductor device of claim 5 , wherein at least a portion of the additional thinner region is positioned longitudinally adjacent to at least a portion of the thinner lateral region of the cladding layer.
7. The semiconductor device of claim 6 , wherein at least a portion of the additional thicker region is positioned longitudinally adjacent to at least a portion of the thicker lateral region of the cladding layer.
8. The semiconductor device of claim 1 , wherein the thicker and thinner lateral regions of the cladding layer, the further thicker and thinner lateral regions of the III-V semiconductor layer, and the additional thicker and thinner lateral regions of the silicon semiconductor are shaped to form the waveguide for at least a first wavelength of light.
9. The semiconductor device of claim 8 , wherein the thicker and thinner lateral regions of the cladding layer and the additional thicker and thinner lateral regions of the silicon semiconductor layer are shaped to form a thermal shunt of silicon extending into the cladding layer.
10. The semiconductor device of claim 9 , wherein the thermal shunt has dimensions smaller than the first wavelength of light in the silicon semiconductor layer.
11. The semiconductor device of claim 8 , wherein the thicker and thinner lateral regions of the cladding layer and the additional thicker and thinner lateral regions of the silicon semiconductor layer are shaped to form a plurality of thermal shunts of silicon extending into the cladding layer.
12. The semiconductor device of claim 11 , wherein each thermal shunt has dimensions smaller than the first wavelength of light in the silicon semiconductor layer.
13. The semiconductor device of claim 1 , wherein the cladding layer includes a dielectric material and has a thermal conductivity less than a thermal conductivity of silicon.
14. The semiconductor device of claim 1 , further comprising:
a buried oxide layer positioned on the silicon semiconductor layer, the buried oxide layer including a hole, at least a portion of the hole being longitudinally aligned with at least a portion of the thicker lateral region of the cladding layer.
15. The semiconductor device of claim 14 , further comprising:
a thermally conductive material positioned in the hole, the thermally conductive material having a thermal conductivity greater than a thermal conductivity of the buried oxide layer.
16. The semiconductor device of claim 15 , wherein the thermally conductive material is one of: a polysilicon, metal, a thermal paste.
17. The semiconductor device of claim 16 , further comprising:
a substrate positioned on the buried oxide layer, the hole extending through the substrate.
18. The semiconductor device of claim 17 , wherein the hole extends to the silicon semiconductor layer.
19. The semiconductor device of claim 18 , wherein the thermally conductive material in the hole extends to at least the silicon semiconductor layer.
20. The semiconductor device of claim 14 , wherein the hole extends through the silicon semiconductor layer to the cladding layer.