Failure prediction system and method

1. A method comprising:

determining, for a given hardware link, whether a signal error rate for signals sent over the given hardware link is beyond a given threshold; and

when the signal error rate is beyond the given threshold, generating an error indication for the given hardware link, the error indication comprising a prediction that a hardware component associated with the given hardware link is likely to fail,

wherein said determining whether the signal error rate is beyond the given threshold comprises:

determining a corrected error rate and an uncorrected error rate, the corrected error rate comprising effective bit error rate (effective BER) and the uncorrected error rate comprising raw bit error rate (raw BER);

comparing the corrected error rate and the uncorrected error rate; and

when a result of comparing the corrected error rate and the uncorrected error rate is beyond the given threshold, generating an error indication for the given hardware link, and

the signal error rate is determined to be beyond the given threshold according to the formula:

abs(log(effective BER )−log(raw BER ))< t

wherein t is the given threshold and the raw BER is more than a predetermined minimum value.

2. The method according to claim 1 and wherein t is between 4.2 and 4.

3. The method according to claim 1 and wherein t is equal to 4.

4. The method according to claim 1 and wherein the hardware component comprises a switch.

5. The method according to claim 1 and also comprising, after generating said error indication:

when the signal error rate is no longer beyond the given threshold, generating a recovery indication for the given hardware link, the recovery indication indicating that it is no longer predicted that the hardware component associated with the given hardware link is likely to fail.

6. A failure forecasting system comprising:

link fail forecast circuitry configured to determine, for a given hardware link, whether a signal error rate for signals sent over the given hardware link is beyond a given threshold; and

error determination circuitry configured, when the signal error rate is beyond the given threshold, to generate an error indication for the given hardware link, the error indication comprising a prediction that a hardware component associated with the given hardware link is likely to fail,

wherein said link fail forecast circuitry is configured to determine whether the signal error rate is beyond the given threshold by:

determining a corrected error rate and an uncorrected error rate, the uncorrected error rate comprising raw bit error rate (raw BER), and the corrected error rate comprising effective bit error rate (effective BER);

comparing the corrected error rate and the uncorrected error rate; and

when a result of comparing the corrected error rate and the uncorrected error rate is beyond the given threshold, generating an error indication for the given hardware link, and

the signal error rate is determined to be beyond the given threshold according to the formula:

abs(log(effective BER )−log(raw BER ))< t

wherein t is the given threshold, and wherein the raw BER is more than a predetermined minimum value.

7. The system according to claim 6 and wherein t is between 4.2 and 4.

8. The system according to claim 6 and wherein t is equal to 4.

9. The system according to claim 6 and wherein the hardware component comprises a switch.

10. The system according to claim 6 and wherein said error determination circuitry is also configured, after the generating said error indication:

when the signal error rate is no longer beyond the given threshold, to generate a recovery indication for the given hardware link, the recovery indication comprising an indicating that it is no longer predicted that the hardware component associated with the given hardware link is likely to fail.