Memory system with adaptive read-threshold scheme and method of operating such memory system
Adaptive read-threshold schemes for a memory system determine read-threshold with the lowest BER/UECC failure-rates while continuing to serve the host-reads with the required QoS. When it is determined that the QoS or other quality metric is not met for a particular read-threshold, which may be an initial, default, read-threshold, the performance of other read-thresholds are estimated. These estimates may then be used to determine an optimal read-threshold. During the iterative process, selection variables, e.g., how many times, and for which read commands, to use each of the non-default read-thresholds in future read-attempts may be determined on-the-fly.
1. A memory system, comprising:
a memory device;
a performance tracker configured to:
estimate performance on the memory device at one or more read-thresholds; and
a read-threshold selector configured to:
select when, and how many times, to use each of the plurality of read-thresholds based on the performance estimates, and
determine an optimal read-threshold based on the performance estimates.
2. The performance tracker of claim 1 , further comprising:
monitor, in response to read commands, read-attempts on the memory device at a first read-threshold,
track performance of the read-attempts at the first threshold.
3. The memory system of claim 2 , wherein a performance tracker is configured to estimate performance of each of a plurality of other read-thresholds when the performance of the read-attempts at the first threshold is below a set quality metric.
4. The memory system of claim 1 , wherein the read-threshold selector is configured to select when, and how many times, to use each of the plurality of other read-thresholds on-the-fly.
5. The memory system of claim 1 , wherein the read-threshold selector selects a read-threshold r_i, of the plurality of other read-thresholds, to be applied to a fraction f_i of read commands to be served, where i is a natural number.
6. The memory system of claim 5 , wherein the read-threshold selector determines f_i based on multi-armed bandit theory.
7. The memory system of claim 5 , wherein the read-threshold selector modifies f_i on-the-fly based on the performance estimates.
8. The memory system of claim 1 , wherein the performance tracker and the read-threshold selector are embodied as a single component.
9. The memory system of claim 1 , wherein the performance tracked and the performance estimated by the performance tracker comprises at least one Quality of Service (QoS) requirement of the memory device, and the set quality metric relates to the at least one QoS requirement.
10. The memory system of claim 1 , further comprising:
a decoder configured to:
perform decoding after each read-attempt to generate decoding results, and
transmit the decoding results to the read-threshold selector for use in selecting when, and how many times, to use each of the plurality of other read-thresholds in future read-attempts.
11. The memory system of claim 10 , wherein the read-threshold selector is configured to use the decoding results to select when, and how many times, to use each of the plurality of other read-thresholds in future read-attempts.
12. The memory system of claim 1 , wherein the read-threshold selector selects the plurality of read-thresholds to be used deterministically or stochastically.
13. The method of claim 2 , wherein the first read-threshold is the best read threshold based the performance of read-attempts.