IP Library › Granted Patent US 10,998,433
Granted Patent B2
US 10,998,433 · App. 16/559,210 · Granted May 4, 2021

Semiconductor device

Inventors: Hung Hung (Kawasaki, JP); Yasuhiro Isobe (Ota, JP); Akira Yoshioka (Yokohama, JP); Toru Sugiyama (Musashino, JP); Masaaki Iwai (Yokohama, JP); Naonori Hosokawa (Yokohama, JP); Masaaki Onomura (Setagaya, JP)
Assignees: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation
H01L29/7786H01L29/404H01L29/0619H01L29/2003H01L29/4236
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Quick Facts
Patent No.
US 10,998,433
App. No.
16/559,210
Granted
May 4, 2021
Kind
B2
Abstract

A semiconductor device of an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer placed on the first nitride semiconductor layer; a first electrode placed on the second nitride semiconductor layer; a second electrode placed on the first nitride semiconductor layer; a gate electrode placed between the first electrode and the second electrode; a first field plate electrode placed on the second nitride semiconductor layer, the first field plate electrode having the same height as the gate electrode; and a second field plate electrode provided on an upper side of the first field plate electrode, the second field plate electrode being placed on a side of the second electrode compared to the first field plate electrode.

Claims (25)

1. A semiconductor device comprising:

a first nitride semiconductor layer;

a second nitride semiconductor layer placed on the first nitride semiconductor layer, the second nitride semiconductor layer having a larger bandgap than the first nitride semiconductor layer;

a first electrode placed on the second nitride semiconductor layer, the first electrode being electrically connected to the first nitride semiconductor layer;

a second electrode placed on the first nitride semiconductor layer, the second electrode being electrically connected to the first nitride semiconductor layer;

a gate electrode placed between the first electrode and the second electrode;

a first field plate electrode placed on the second nitride semiconductor layer, the first field plate electrode having the same height as the gate electrode; and

a second field plate electrode provided on an upper side of the first field plate electrode, the second field plate electrode being placed on a side of the second electrode compared to the first field plate electrode.

2. The device according to claim 1 , further comprising an insulation film between the first field plate electrode and the second field plate electrode.

3. The device according to claim 1 , wherein the first field plate electrode and the second field plate electrode are electrically connected to the first electrode.

4. The device according to claim 1 , further comprising a first conductive layer and a second conductive layer on the gate electrode,

wherein a distance between the first conductive layer and the second electrode is equal to or longer than a distance between the gate electrode and the second electrode, and

a distance between the second conductive layer and the second electrode is equal to or longer than the distance between the gate electrode and the second electrode.

5. The device according to claim 1 , wherein a distance between the gate electrode and the first field plate electrode is longer than 0.0 μm and equal to or shorter than 10 μm.

6. The device according to claim 1 , wherein the first field plate electrode and the second field plate electrode overlap with each other at least in a part in a laminate direction of the first nitride semiconductor layer and the second nitride semiconductor layer.

7. The device according to claim 1 , wherein the gate electrode and the first field plate electrode are the same conductive material.

8. The device according to claim 1 , further comprising a third field plate electrode placed on an upper side of the gate electrode, the third field plate electrode being extended in a direction of the second electrode, and the third field plate electrode being electrically connected with the first electrode, and

a fourth field plate electrode between the second field plate electrode and the second electrode.

9. A semiconductor device comprising:

a first nitride semiconductor layer;

a second nitride semiconductor layer placed on the first nitride semiconductor layer, the second nitride semiconductor layer having a larger bandgap than the first nitride semiconductor layer;

a first electrode placed on the first nitride semiconductor layer, the first electrode being electrically connected to the first nitride semiconductor layer;

a second electrode placed on the first nitride semiconductor layer, the second electrode being electrically connected to the first nitride semiconductor layer;

a gate electrode placed between the first electrode and the second electrode; and

a first field plate electrode directly in contact with the second nitride semiconductor layer, the first field plate electrode having the same height as the gate electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2019
From: HUNG, HUNG; ISOBE, YASUHIRO; YOSHIOKA, AKIRA; SUGIYAMA, TORU; IWAI, MASAAKI; HOSOKAWA, NAONORI; ONOMURA, MASAAKI
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 050777/0711 →
Priority Claims (1)
JP JP2019-048043 · Mar 15, 2019 · national
Continuity (1)
Related Publication 20200295171A1 · Sep 17, 2020
Cited By (1)
US 12,218,207