IP Library Granted Patent US 11,334,266
Granted Patent B2
US 11,334,266 · App. 16/564,364 · Granted May 17, 2022

Memory system and method for controlling nonvolatile memory

Inventor: Shinichi Kanno (Ota, JP)
Assignee: KIOXIA CORPORATION
G06F3/064G06F3/0614G06F3/0659G06F3/0679G06F9/5016G06F12/0246G06F12/0623G06F13/1668G06F2212/7202
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Quick Facts
Patent No.
US 11,334,266
App. No.
16/564,364
Granted
May 17, 2022
Kind
B2
Abstract

According to one embodiment, when receiving a write command including a first identifier of identifiers for accessing regions from a host, a memory system allocates one block of a common free block group shared by the regions as a write destination block for the region corresponding to the first identifier. When receiving a copy command including a block address of a copy source block of blocks belonging to the region corresponding to the first identifier, and an identifier of a copy destination target region indicative of the first identifier from the host, the memory system allocates one block as a copy destination block for the region corresponding to the first identifier, and copies data from the copy source block to the copy destination block.

Claims (42)

1. A memory system connectable to a host, the memory system comprising:

a nonvolatile memory including a plurality of blocks; and

a controller electrically connected to the nonvolatile memory and configured to control the nonvolatile memory, wherein the controller is configured to:

create a plurality of regions, each of which is a subset of the blocks, respectively in response to region create commands received from the host;

allocate, when receiving a write command including a first identifier of a plurality of identifiers for accessing the plurality of regions and an identifier of first data from the host, one block of a common free block group shared by the plurality of regions as a first write destination block for the region corresponding to the first identifier, wherein the write command does not include a block address of a write destination block to which the first data is to be written;

write the first data associated with the write command to the first write destination block, and to notify, as an address record request, the host of (i) the identifier of the first data, (ii) a block address of the first write destination block, and (iii) an offset indicative of a storage location in the first write destination block to which the first data is written;

read, when receiving a read command including a first physical address indicative of the block address and the offset from the host, the first data from the nonvolatile memory based on the first physical address;

allocate, when receiving a copy command including a block address of a copy source block of blocks belonging to the region corresponding to the first identifier, and an identifier of a copy destination target region of the plurality of regions from the host, one block of the common free block group as a first copy destination block for the copy destination target region, wherein the copy command does not include a block address of a copy destination block of blocks belonging to the copy destination target region; and

copy copy target data from the copy source block to the first copy destination block, and to notify, as an address change request, the host of (i) an identifier of the copy target data, (ii) an identifier of the copy destination target region, (iii) a block address of the first copy destination block, and (iv) an offset indicative of a location in the first copy destination block to which the copy target data is copied.

2. The memory system of claim 1 , wherein

the controller is configured, when the first write destination block is filled with data by writing of a first data portion which is a part of the first data, to allocate one block of the common free block group as a second write destination block for the region corresponding to the first identifier, and to write a second data portion which is a remaining part of the first data to the second write destination block.

3. The memory system of claim 2 , wherein

the controller is configured to notify an identifier of the first data portion of the first data, the block address of the first write destination block, an offset indicative of a storage location in the first write destination block to which the first data portion is written, an identifier of the second data portion of the first, a block address of the second write destination block, and an offset indicative of a storage location in the second write destination block to which the second data portion is written to the host as the address record request.

4. The memory system of claim 1 , wherein

the controller is configured, when the first copy destination block is filled with data by copying of a third data portion which is a part of the copy target data in the copy source block, to allocate one block of the common free block group as a second copy destination block for the copy destination target region, and to copy a fourth data portion which is a remaining part of the copy target data to the second copy destination block.

5. The memory system of claim 4 , wherein

the controller is configured to notify, as the address change request, the host of an identifier of the third data portion of the copy target data, the identifier of the copy destination target region, the block address of the first copy destination block, an offset indicative of a storage location in the first copy destination block to which the third data portion is copied, an identifier of the fourth data portion of the copy target data, a block address of the second copy destination block, and an offset indicative of a storage location in the second copy destination block to which the fourth data portion is copied.

6. The memory system of claim 1 , wherein

each of the plurality of blocks belongs to one of the plurality of regions, and the same block does not simultaneously belong to different regions of the plurality of regions.

7. The memory system of claim 1 , wherein

the controller is configured, when the copy command is a first type of copy command for copying each valid data included in the copy source block, to copy each valid data included in the copy source block to the first copy destination block based on map information notified from the host which indicates whether each data included in the copy source block is valid data or invalid data, and to notify, for each copied valid data, information indicative of an identifier of the valid data, the block address of the first copy destination block, and an offset indicative of a storage location in the first copy destination block to which the valid data is copied to the host as the address change request.

8. The memory system of claim 1 , wherein

the controller is configured, when the copy command is a second type of copy command designating the block address of the copy source block, an offset indicative of a storage location in the copy source block in which the copy target data is stored, and a length of the copy target data, to copy the copy target data from the copy source block to the first copy destination block based on the offset and the length designated by the second type of copy command.

9. A method of controlling a nonvolatile memory including a plurality of blocks, the method comprising:

creating a plurality of regions, each of which is a subset of the blocks, respectively in response to region create commands received from the host;

allocating, when receiving a write command including a first identifier of a plurality of identifiers for accessing the plurality of regions and an identifier of first data from the host, one block of a common free block group shared by the plurality of regions as a first write destination block for the region corresponding to the first identifier, wherein the write command does not include a block address of a write destination block to which the first data is to be written;

writing the first data associated with the write command to the first write destination block;

notifying, as an address record request, the host of (i) the identifier of the first data, (ii) a block address of the first write destination block, and (iii) an offset indicative of a storage location in the first write destination block to which the first data is written;

reading, when receiving a read command including a first physical address indicative of the block address and the offset from the host, the first data from the nonvolatile memory based on the first physical address;

allocating, when receiving a copy command including a block address of a copy source block of blocks belonging to the region corresponding to the first identifier, and an identifier of a copy destination target region of the plurality of regions from the host, one block of the common free block group as a first copy destination block for the copy destination target region, wherein the copy command does not include a block address of a copy destination block of blocks belonging to the copy destination target region;

copying copy target data from the copy source block to the first copy destination block; and

notifying, as an address change request, the host of (i) an identifier of the copy target data, (ii) an identifier of the copy destination target region, (iii) a block address of the first copy destination block, and (iv) an offset indicative of a location in the first copy destination block to which the copy target data is copied.

10. The method of claim 9 , further comprising:

allocating one block of the common free block group as a second write destination block for the region corresponding to the first identifier when the first write destination block is filled with data by writing of a first data portion which is a part of the first data: and

writing a second data portion which is a remaining part of the first data to the second write destination block.

11. The method of claim 10 , further comprising notifying the host of an identifier of the first data portion of the first data, the block address of the first mite destination block, an offset indicative of a storage location in the first write destination block to which the first data portion is written, an identifier of the second data portion of the first data, a block address of the second write destination block, and an offset indicative of a storage location in the second write destination block to which the second data portion is written as the address record request.

12. The method of claim 9 , further comprising:

allocating one block of the common free block group as a second copy destination block for the copy destination target region when the first copy destination block is filled with data by copying of a third data portion which is a part of the copy target data in the copy source block; and

coping a fourth data portion which is a remaining part of the copy target data to the second copy destination block.

13. The method of claim 12 , further comprising notifying, as the address change request, the host of an identifier of the third data portion of the copy target data, the identifier of the copy destination target region, the block address of the first copy destination block, an offset indicative of a storage location in the first copy destination block to which the third data portion is copied, an identifier of the fourth data portion of the copy target data, a block address of the second copy destination block, and an offset indicative of a storage location in the second copy destination block to which the fourth data portion is copied.

14. The method of claim 9 , wherein

each of the plurality of blocks belongs to one of the regions, and the same block does not simultaneously belong to different regions of the plurality of regions.

Assignments (2)
CHANGE OF NAME Recorded Jan 11, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058725/0932 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2019
From: KANNO, SHINICHI
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 050848/0287 →
Priority Claims (1)
JP JP2019-013221 · Jan 29, 2019 · national
Continuity (1)
Related Publication 20200241750A1 · Jul 30, 2020
Cited By (5)
US 12,292,827 US 12,298,902 US 12,360,892 US 12,504,899 US 12,572,468