IP Library Granted Patent US 12,360,892
Granted Patent B2
US 12,360,892 · App. 18/238,282 · Granted Jul 15, 2025

Prefetching data for sequential reads in nonvolatile memory device

Inventors: Keunsan Park (Suwon-si, KR); Gyeongmin Kim (Suwon-si, KR); Joon-Whan Bae (Suwon-si, KR); Heetak Shin (Suwon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06F12/0292G06F3/0604G06F3/0619G06F3/0631G06F3/064G06F3/0647G06F3/0652G06F3/0656G06F3/0679G06F11/1068G06F11/1451G06F12/023G06F2212/1016
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Quick Facts
Patent No.
US 12,360,892
App. No.
18/238,282
Granted
Jul 15, 2025
Kind
B2
Abstract

A storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller including an internal buffer including zone buffers, and configured to: allocate a plurality of zones to a storage space, select two or more erase units to be allocated to each zone based on a zone map table, fixedly and sequentially manage logical addresses of data written in the plurality of zones, based on reads for sequential logical addresses being requested by the external host device, read first data corresponding to the sequential logical addresses from the nonvolatile memory device, and output the first data to the external host device, and based on the reads being requested, perform a prefetch operation by reading second data corresponding to next sequential logical addresses, and storing the second data in the internal buffer, without receiving a next read request from the external host device.

Claims (59)

1. A storage device comprising:

a nonvolatile memory device comprising a plurality of memory cells; and

a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells,

wherein the controller comprises an internal buffer including zone buffers, and is further configured to:

allocate a plurality of zones to a storage space of the nonvolatile memory device based on a request received from an external host device,

select two or more erase units from among a plurality of erase units included in the plurality of memory cells to be allocated to each zone of the plurality of zones based on a zone map table,

fixedly and sequentially manage logical addresses of data written in the plurality of zones,

based on reads for sequential logical addresses being requested by the external host device, read first data corresponding to the sequential logical addresses from the nonvolatile memory device, and output the first data to the external host device, and

based on the reads being requested:

determine next sequential addresses without receiving a next read request from the external host device,

determine at least one zone to which the next sequential addresses belong, and

based on at least one feature corresponding to the at least one zone, perform a prefetch operation by reading second data corresponding to the next sequential logical addresses from the nonvolatile memory device, and storing the second data in the internal buffer.

2. The storage device of claim 1 , wherein, based on the sequential logical addresses and some logical addresses of the next sequential logical addresses belonging to a first zone from among the plurality of zones, and the remaining logical addresses of the next sequential logical addresses belonging to a second zone from among the plurality of zones, the controller is configured to read the second data corresponding to the remaining logical addresses from the nonvolatile memory device based on a first feature corresponding to the first zone and a second feature corresponding to the second zone.

3. The storage device of claim 2 , wherein, based on the first feature being identical to the second feature, the controller is further configured to read the second data corresponding to the remaining logical addresses from the nonvolatile memory device, and

wherein, based on the first feature being different from the second feature, the controller is further configured to not read the second data corresponding to the remaining logical addresses from the nonvolatile memory device.

4. The storage device of claim 2 , wherein, based on the second zone being a gap zone, the controller is further configured to read third data corresponding to logical addresses of a third zone continuous with the second zone from the nonvolatile memory device, based on the first feature and a third feature corresponding to the third zone.

5. The storage device of claim 2 , wherein the first feature comprises a cell type of the first zone, and

wherein the second feature comprises a cell type of the second zone.

6. The storage device of claim 2 , wherein the controller is further configured to assign a temperature to each zone of the plurality of zones based on update frequencies of the plurality of zones,

wherein the first feature comprises a temperature of the first zone, and

wherein the second feature comprises a temperature of the second zone.

7. The storage device of claim 2 , wherein the controller is further configured to use a same stream identifier in each zone,

wherein the first feature comprises a first stream identifier corresponding to the first zone, and

wherein the second feature comprises a second stream identifier corresponding to the second zone.

8. The storage device of claim 1 , wherein the controller is further configured to determine that the reads for the sequential logical addresses are requested based on a number of read requests for the sequential logical addresses received from the external host device being greater than or equal to a threshold value.

9. The storage device of claim 1 , wherein the controller is further configured to discard the second data based on a number of read requests which are not related to the sequential logical addresses received from the external host device being greater than or equal to a threshold value.

10. The storage device of claim 1 , wherein the nonvolatile memory device comprises a plurality of memory chips,

wherein each memory chip of the plurality of memory chips comprises a plurality of memory blocks,

wherein each memory block of the plurality of memory blocks comprises at least two erase units, and

wherein the controller is further configured to select at least one erase unit included in the each memory block to be allocated to a zone.

11. The storage device of claim 10 , wherein the controller is further configured to select a memory block in each of the plurality of memory chips to be managed as a device zone.

12. The storage device of claim 11 , wherein garbage collection for the plurality of zones is performed based on a garbage collection request received from the external host device.

13. The storage device of claim 11 , wherein garbage collection for the plurality of zones is performed as a background operation by the controller.

14. The storage device of claim 11 , wherein the device zone comprises two or more zones.

15. The storage device of claim 14 , wherein the controller is further configured to allocate the zone as a busy zone.

16. The storage device of claim 15 , wherein based on the zone being reset based on a reset request received from the external host device, when all zones included in the device zone including the zone are in a reset state, the controller is configured to allocate the all zones as free zones.

17. The storage device of claim 15 , wherein, based on an access error occurring in a first zone, the controller is further configured to prohibit a zone read service for the first zone, wherein the zone read service is based on the zone map table.

18. The storage device of claim 15 , wherein the controller is configured to erase units included in a zone having a reset state.

19. A storage device comprising:

a nonvolatile memory device comprising a plurality of memory cells; and

a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells,

wherein the controller comprises an internal buffer including zone buffers, and is further configured to:

allocate a plurality of zones to a storage space of the nonvolatile memory device based on a request received from an external host device,

select two or more erase units from among a plurality of erase units included in the plurality of memory cells to be allocated to each of the plurality of zones based on a zone map table,

fixedly and sequentially manage logical addresses of data written in the plurality of zones,

based on reads for sequential logical addresses being requested by the external host device:

read first data corresponding to the sequential logical addresses from the nonvolatile memory device; and

output the first data to the external host device, and

based on the reads being requested, perform a prefetch operation by reading second data corresponding to next sequential logical addresses from the nonvolatile memory device, and storing the second data in the internal buffer, without receiving a next read request from the external host device,

wherein, based on the sequential logical addresses and some logical addresses from among the next sequential logical addresses belonging to a first zone from among the plurality of zones, and remaining logical addresses from among the next sequential logical addresses belonging to a second zone from among the plurality of zones, the controller is further configured to read the second data corresponding to the remaining logical addresses from the nonvolatile memory device based on a first feature corresponding to the first zone and a second feature corresponding to the second zone,

wherein the first feature comprises a cell type and a stream identifier corresponding to the first zone, and

wherein the second feature comprises a cell type and a stream identifier corresponding to the second zone.

20. An operating method of a storage device which includes a nonvolatile memory device and a controller, the method comprising:

allocating, by the controller, a plurality of zones comprising two or more erase units of the nonvolatile memory device based on a zone map table;

receiving, by the controller, read requests from an external host device;

based on the read requests, reading, by the controller, first data from the nonvolatile memory device and outputting the first data to the external host device; and

based on the read requests being read requests for sequential logical addresses, performing, at the controller, a prefetch operation by reading second data corresponding to next sequential logical addresses from the nonvolatile memory device to be stored in an internal buffer, without receiving a next read request from the external host device,

wherein the performing of the prefetch operation comprises:

based on the sequential logical addresses and some logical addresses of the next sequential logical addresses belonging to a first zone from among the plurality of zones, and remaining logical addresses of the next sequential logical addresses belonging to a second zone from among the plurality of zones, reading, by the controller, second data corresponding to the remaining logical addresses from the nonvolatile memory device based on a first feature corresponding to the first zone and a second feature corresponding to the second zone.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2023
From: PARK, KEUNSAN; KIM, GYEONGMIN; BAE, JOON-WHAN; SHIN, HEETAK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 064709/0896 →
Priority Claims (15)
KR 10-2022-0109942 · Aug 31, 2022 · national
KR 10-2022-0149964 · Nov 10, 2022 · national
KR 10-2023-0004966 · Jan 12, 2023 · national
KR 10-2023-0004994 · Jan 12, 2023 · national
KR 10-2023-0005013 · Jan 12, 2023 · national
KR 10-2023-0005033 · Jan 12, 2023 · national
KR 10-2023-0005040 · Jan 12, 2023 · national
KR 10-2023-0005041 · Jan 12, 2023 · national
KR 10-2023-0005043 · Jan 12, 2023 · national
KR 10-2023-0005044 · Jan 12, 2023 · national
KR 10-2023-0005046 · Jan 12, 2023 · national
KR 10-2023-0005048 · Jan 12, 2023 · national
KR 10-2023-0005050 · Jan 12, 2023 · national
KR 10-2023-0005053 · Jan 12, 2023 · national
KR 10-2023-0005058 · Jan 12, 2023 · national
Continuity (1)
Related Publication 20240069777A1 · Feb 29, 2024
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