Semiconductor device manufacturing method and semiconductor device

1. A semiconductor device manufacturing method comprising:

forming an organic insulating layer on a semiconductor on which metal wiring is provided, the organic insulating layer having an opening to expose a part of the metal wiring;

forming a seed metal covering the part of the metal wiring exposed from the opening, an inside face of the organic insulating layer in the opening, and a portion of the organic insulating layer around the opening;

forming a mask covering an edge of the seed metal while exposing part of the seed metal formed in the opening, the mask including an inorganic dielectric material;

forming a barrier metal on the seed metal exposed from the mask by electroless plating;

without removing the mask, forming a solder ball on the barrier metal; and

reflowing the solder ball on the barrier metal and the mask.

2. The semiconductor device manufacturing method according to claim 1 , wherein

the solder ball is reflowed at 250° C., and

the solder ball has a diameter of 160 μm.

3. The semiconductor device manufacturing method according to claim 1 , further comprising:

forming a gold (Au) layer on the barrier metal without interruption after the forming of the barrier metal,

wherein the Au layer has a thickness of 10 nm.

4. The semiconductor device manufacturing method according to claim 1 ,

wherein the mask includes an insulating silicon compound.

5. The semiconductor device manufacturing method according to claim 1 ,

wherein the barrier metal is a nickel (Ni) layer with a thickness of from 3 μm to 6 μm.

6. The semiconductor device manufacturing method according to claim 1 , wherein

the seed metal includes titanium (Ti) and palladium (Pd) on the titanium, and

a thickness of the titanium is 50 nm, and a thickness of the palladium is 100 nm.

7. The semiconductor device manufacturing method according to claim 1 ,

wherein a distance between the edge of the seed metal and an inside edge of the mask is from 4 μm to 8 μm.

8. A semiconductor device manufacturing method comprising:

forming an organic insulating layer on a semiconductor on which metal wiring is provided, the organic insulating layer having a first opening to expose a part of the metal wiring;

forming a seed metal layer covering the part of the metal wiring exposed from the first opening, an inside face of the organic insulating layer in the first opening, and a portion of the organic insulating layer around the first opening;

forming a mask covering an edge of the seed metal layer and the organic insulating layer, the mask having a second opening to expose part of the seed metal layer;

forming a barrier metal layer on the seed metal layer exposed from the second opening of the mask, the barrier metal layer being separated from the organic insulating layer;

without removing the mask, forming a solder ball on the barrier metal; and

reflowing the solder ball on the barrier metal layer and the mask.

9. The semiconductor device manufacturing method according to claim 8 ,

wherein the solder ball has a diameter of 160 μm by the flowing at 250° C.

10. The semiconductor device manufacturing method according to claim 8 , further comprising:

forming an Au layer on the barrier metal layer without interruption after the forming of the barrier metal layer,

wherein the Au layer has a thickness of 10 nm.

11. The semiconductor device manufacturing method according to claim 8 , wherein

the mask includes an insulating silicon compound, and

the mask remains on the edge of the seed metal layer.

12. The semiconductor device manufacturing method according to claim 8 ,

wherein the barrier metal layer is a Ni layer with a thickness of from 3 μm to 6 μm.

13. The semiconductor device manufacturing method according to claim 8 , wherein

the seed metal layer includes a Ti layer and a Pd layer on the Ti layer, and

a thickness of the Ti layer is 50 nm, and a thickness of the Pd layer is 100 nm.

14. The semiconductor device manufacturing method according to claim 8 ,

wherein a distance between the edge of the seed metal layer and an inside edge of the mask is from 4 μm to 8 μm.