IP Library › Granted Patent US 11,183,482
Granted Patent B2
US 11,183,482 · App. 16/572,628 · Granted Nov 23, 2021

Shift control method in manufacture of semiconductor device

Inventors: Chih-Wei Wu (Yilan County, TW); Ying-Ching Shih (Hsinchu, TW); Hsien-Ju Tsou (Taipei, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L24/96H01L21/561H01L21/568H01L21/78H01L22/20H01L22/26H01L23/544H01L22/12H01L2223/54426H01L2224/95001H01L2224/95121
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Quick Facts
Patent No.
US 11,183,482
App. No.
16/572,628
Granted
Nov 23, 2021
Kind
B2
Abstract

A shift control method in manufacture of semiconductor device includes at least the following step. An overlay offset of a first target of a semiconductor die and a second target of the semiconductor die is determined, where the second target is disposed on the first target. The semiconductor die is placed over a carrier, where placing the semiconductor die includes feeding back the overlay offset to result in a positional control of the semiconductor die. The semiconductor die is post processed to form a semiconductor device. Other shift control methods in manufacture of semiconductor device are also provided.

Claims (20)

1. A shift control method in manufacture of semiconductor device, comprising:

determining an overlay offset of a first target of a semiconductor die and a second target of the semiconductor die, wherein the second target is disposed on the first target;

placing the semiconductor die over a carrier, wherein placing the semiconductor die comprises feeding back the overlay offset to result in a positional control of the semiconductor die; and

post processing the semiconductor die to form a semiconductor device.

2. The shift control method in manufacture of semiconductor device of claim 1 , wherein determining the overlay offset of the first target and the second target is performed before singulating the semiconductor die from a semiconductor wafer.

3. The shift control method in manufacture of semiconductor device of claim 1 , wherein

the first target is a conductive pad of the semiconductor die and the second target is a conductive connector of the semiconductor die electrically connected to the conductive pad, and

determining the overlay offset of the first target and the second target comprises calculating a difference of relative position between the conductive connector and the conductive pad relative to a reference mark on the semiconductor die.

4. The shift control method in manufacture of semiconductor device of claim 1 , wherein the overlay offset indicates a degree of offset between the first target and the second target in a dimensional direction, and feeding back the overlay offset comprises:

placing the semiconductor die at a position to compensate for the degree of offset.

5. The shift control method in manufacture of semiconductor device of claim 1 , wherein post processing the semiconductor die comprises:

forming an insulating encapsulation on the carrier to encapsulate the semiconductor die, wherein a position of the semiconductor die on the carrier is shifted after forming the insulating encapsulation; and

measuring a shift of the semiconductor die after forming the insulating encapsulation.

6. The shift control method in manufacture of semiconductor device of claim 5 , wherein post processing the semiconductor die further comprises:

compensating for the shift of the semiconductor die when forming a lithographic pattern on the semiconductor die which is performed after forming the insulating encapsulation.

7. The shift control method in manufacture of semiconductor device of claim 5 , wherein placing the semiconductor die further comprises:

placing a plurality of the semiconductor dies over the carrier, wherein a gap is between adjacent two of the plurality of the semiconductor dies, and after forming the insulating encapsulation, the gap filled by the insulating encapsulation changes.

8. The shift control method in manufacture of semiconductor device of claim 7 , wherein measuring the shift of the semiconductor die after forming the insulating encapsulation comprises:

setting one of the plurality of the semiconductor dies as a reference point; and

determining a relative displacement of the plurality of the semiconductor dies relative to the reference point.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2019
From: WU, CHIH-WEI; SHIH, YING-CHING; TSOU, HSIEN-JU
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 050709/0663 →
Continuity (1)
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