Method and structure to improve overlay margin of non-self-aligned contact in metallization layer
A semiconductor structure includes at least one non-self-aligned contact in a metallization layer and a fabrication method for forming the same are disclosed. The method includes forming gate metal in a gate stack on a substrate and forming a source-drain contact in a source-drain stack on the substrate. The gate stack and the source-drain stack are separated by a sidewall spacer. The method recesses the sidewall spacer thereby forming a trench. In the trench, a first outer metal liner and a second outer metal liner are recessed, horizontally enlarging the trench to form a widened trench over respective top surfaces of the recessed first outer metal liner, second outer metal liner, and sidewall spacer. The method then deposits dielectric material filling the widened trench and contacting the first inner metal core, the second inner metal core, the first outer metal liner, the second outer metal liner, and the sidewall spacer.
1. A method of fabricating a semiconductor structure including at least one non-self-aligned contact in a metallization layer, the method comprising:
providing a semiconductor material stack including
a substrate;
a plurality of layers,
a gate stack,
a source-drain stack, and
a sidewall spacer adjacent to, interposed between, and contacting, the gate stack and the source-drain stack;
forming gate metal in the gate stack, the gate metal including a first inner metal core and first outer metal liner contacting the first inner metal core and the sidewall spacer;
forming a source-drain contact in the source-drain stack, the source-drain contact including a second inner metal core and second outer metal liner contacting the second inner metal core and the sidewall spacer;
recessing the sidewall spacer exposing a portion of the first outer metal liner and a portion of the second outer metal liner;
recessing the exposed portions of the first and second outer metal liners to expose a portion of the first inner metal core and a portion of the second inner metal core; and
forming a dielectric layer on and in contact with the exposed portions of the first inner metal core and the second inner metal core, and further in contact with the recessed first outer metal liner and second outer metal liner.
2. The method of claim 1 , wherein the dielectric layer is made of an inter-layer dielectric (ILD) material, and wherein the formation of the dielectric layer comprises deposition of the ILD material, and further includes:
deposition of the ILD material thereby filling a trench formed by the recessed sidewall spacer and the recessed exposed portions of the first and second outer metal liners, and the ILD material contacting a sidewall of the first inner metal core, a sidewall of the second inner metal core, and respective top surfaces of the recessed first outer metal liner, second outer metal liner, and sidewall spacer.
3. The method of claim 1 , wherein the second inner metal core comprises at least one conductive material selected from the following set of conductive materials consisting of: Copper (Cu), Cobalt (Co), Aluminum (Al), Tungsten (W), Titanium (Ti), Tantalum (Ta), Ruthenium (Ru), Hafnium (Hf), Zirconium (Zr), Nickel (Ni), Platinum (Pt), Tin (Sn), Silver (Ag), Gold (Au), a conducting metallic compound material, or a conducting metal alloy including at least one of the preceding conductive materials.
4. The method of claim 3 , wherein the second outer metal liner comprises at least one conductive material selected from the following set of conductive materials consisting of: Titanium (Ti), Titanium Nitride (TiN), a conducting metallic compound material, or a conducting metal alloy including at least one of the preceding conductive materials.
5. The method of claim 1 , wherein the first inner metal core comprises at least one conductive material selected from the following set of conductive materials consisting of: Copper (Cu), Cobalt (Co), Aluminum (Al), Tungsten (W), Titanium (Ti), Tantalum (Ta), Ruthenium (Ru), Hafnium (Hf), Zirconium (Zr), Nickel (Ni), Platinum (Pt), Tin (Sn), Silver (Ag), Gold (Au), a conducting metallic compound material, or a conducting metal alloy including at least one of the preceding conductive materials.
6. The method of claim 5 , wherein the first outer metal liner comprises at least one conductive material selected from the following set of conductive materials consisting of: Titanium (Ti), Titanium Nitride (TiN), a conducting metallic compound material, or a conducting metal alloy including at least one of the preceding conductive materials.
7. The method of claim 1 , wherein the dielectric layer is made of a dielectric material which comprises at least one dielectric material selected from the following set of dielectric materials consisting of:
Silicon Nitride (SiN), Silicon Carbide (SiC), SiCO, Silicon Oxide (SiO), Silicon Dioxide (SiO 2 ), Carbon Doped Silicon Oxide (SiCOH), SiCH, one or more silicon-based materials with some or all of the Si replaced by Ge, carbon-doped oxides, inorganic oxides, inorganic polymers, hybrid polymers, organic polymers such as polyamides or SiLK™, other carbon-base materials, organo-inorganic materials such as spin-on glasses and silsesquioxane-based materials, diamond-like carbon (DLC, also known as amorphous hydrogenated carbon, α-C:H), or any of the aforementioned materials in porous form, or in a form that changes during processing to or from being porous and/or permeable to being non-porous and/or non-permeable.
8. The method of claim 1 , wherein the substrate comprises at least one material selected from the following set of materials consisting of:
silicon (Si), silicon germanium (SiGe), silicon carbide (SiC), Si:C (carbon doped silicon), silicon germanium carbide (SiGeC), carbon doped silicon germanium (SiGe:C), III-V compound semiconductor, or II-V compound semiconductor, an organic semiconductor, a layered semiconductor, a silicon-on-insulator, a SiGe-on-insulator, amorphous material, polycrystalline material, monocrystalline material, or a hybrid oriented (HOT) semiconductor material, or a combination of the materials in this set.
9. The method of claim 1 , wherein the sidewall spacer comprises at least one dielectric material selected from the following set of dielectric materials consisting of:
Silicon Nitride (SiN), Silicon Carbide (SiC), SiCO, Silicon Oxide (SiO), Silicon Dioxide (SiO 2 ), Carbon Doped Silicon Oxide (SiCOH), SiCH, one or more silicon-based materials with some or all of the Si replaced by Ge, carbon-doped oxides, inorganic oxides, inorganic polymers, hybrid polymers, organic polymers such as polyamides or SiLK™, other carbon-base materials, organo-inorganic materials such as spin-on glasses and silsesquioxane-based materials, diamond-like carbon (DLC, also known as amorphous hydrogenated carbon, α-C:H), or any of the aforementioned dielectric materials in porous form, or in a form that changes during processing to or from being porous and/or permeable to being non-porous and/or non-permeable.
10. A method of fabricating a semiconductor structure including at least one non-self-aligned contact in a metallization layer, the method comprising:
providing a semiconductor material stack including
a substrate;
a plurality of layers,
a gate stack,
a source-drain stack, and
a sidewall spacer adjacent to, interposed between, and contacting, the gate stack and the source-drain stack;
forming gate metal in the gate stack, the gate metal including an inner metal core and an outer metal liner contacting the inner metal core and the sidewall spacer;
recessing the sidewall spacer exposing a portion of the outer metal liner;
recessing the exposed portion of the outer metal liner to expose a portion of the inner metal core; and
forming a dielectric layer on and in contact with the exposed portions of the inner metal core and the recessed outer metal liner.
11. The method of claim 10 , wherein the dielectric layer is made of a dielectric material which comprises at least one dielectric material selected from the following set of dielectric materials consisting of:
Silicon Nitride (SiN), Silicon Carbide (SiC), SiCO, Silicon Oxide (SiO), Silicon Dioxide (SiO 2 ), Carbon Doped Silicon Oxide (SiCOH), SiCH, one or more silicon-based materials with some or all of the Si replaced by Ge, carbon-doped oxides, inorganic oxides, inorganic polymers, hybrid polymers, organic polymers such as polyamides or SiLK™, other carbon-base materials, organo-inorganic materials such as spin-on glasses and silsesquioxane-based materials, diamond-like carbon (DLC, also known as amorphous hydrogenated carbon, α-C:H), or any of the aforementioned dielectric materials in porous form, or in a form that changes during processing to or from being porous and/or permeable to being non-porous and/or non-permeable.