IP Library Granted Patent US 11,031,886
Granted Patent B2
US 11,031,886 · App. 16/580,449 · Granted Jun 8, 2021

Lead angle adjustment circuit

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Quick Facts
Patent No.
US 11,031,886
App. No.
16/580,449
Granted
Jun 8, 2021
Kind
B2
Abstract

A lead angle adjustment circuit includes a counter that receives an input signal and has an output that is connected to a multiplier circuit. The multiplier circuit has an output connected to a subtractor circuit that has an output connected to a pseudo FG generator circuit. The output of the counter is also connected to a storage register that is coupled to an addition circuit through a range determination circuit, a slope determination circuit, and a multiplier determination circuit. The input signal is input to another counter which is connected to the addition circuit through a start determination circuit and an advance angle calculation circuit. The outputs of the multiplier determination circuit and the advance angle calculation circuit are input to the addition which, which generates a signal is subtracted by the subtractor circuit to generate the signal input into the pseudo FG generator circuit.

Claims (59)

1. A lead angle adjustment circuit, comprising:

a first counter having an input and an output;

a multiplier circuit having an input and an output, the input of the multiplier circuit coupled to the output of the first counter;

a subtractor circuit having a first input, a second input, and an output, the first input of the subtractor coupled to the output of the multiplier circuit;

a storage register having an input and an output, the input of the storage register coupled to the output of the first counter;

a slope determination circuit having a first input, a second input, and an output, the first input of the slope determination circuit coupled to the output of the register and the second input of the slope determination circuit coupled for receiving a first control signal;

a multiplier determination circuit having a first input, a second input, and an output, the output of the multiplier circuit coupled to the second input of the subtractor circuit and the second input of the multiplier circuit coupled for receiving a second control signal; and

an addition circuit having an input and an output, the output of the addition circuit coupled to the second input of the subtractor circuit.

2. The angle adjustment circuit of claim 1 , wherein the slope determination circuit further includes a third input, and further including a range determination circuit having an input and an output, the input of the range determination circuit coupled to the output of the register and the output of the range determination circuit coupled to the third input of the slope determination circuit.

3. The angle adjustment circuit of claim 2 , further including a first voltage divider network coupled to the second input of the slope determination circuit and a second voltage divider network coupled to the second input of the multiplier determination circuit.

4. The lead angle adjustment circuit of claim 3 , wherein the first voltage divider network comprises:

a first resistor having a first terminal and a second terminal, the first terminal of the first resistor coupled to the second input of the slope determination circuit and the second terminal of the first resistor coupled for receiving a first source of operating potential;

a second resistor having a first terminal and a second terminal, the first terminal of the second resistor coupled to the second input of the slope determination circuit and the second terminal of the second resistor coupled for receiving a second source of operating potential; and the second voltage divider network comprises:

a third resistor having a first terminal and a second terminal, the first terminal of the third resistor coupled to the second input of the multiplier determination circuit and the second terminal of the third resistor coupled for receiving the first source of operating potential; and

a fourth resistor having a first terminal and a second terminal, the first terminal of the fourth resistor coupled to the second input of the multiplier determination circuit and the second terminal of the fourth resistor coupled for receiving the second source of operating potential.

5. The lead angle adjustment circuit of claim 2 , further including:

a first resistor having a first terminal and a second terminal, the first terminal of the first resistor coupled to the second input of the slope determination circuit and the second terminal of the first resistor coupled for receiving a first source of potential; and

a second resistor having a first terminal and a second terminal, the first terminal of the second resistor coupled to the second input of the multiplier determination circuit and the second terminal of the second resistor coupled for receiving the first source of operating potential.

6. The lead angle adjustment circuit of claim 2 , further including a pseudo FG generator circuit having an input and an output, the input of the pseudo FG generator circuit coupled to the output of the subtractor circuit.

7. The lead angle adjustment circuit of claim 1 , further including a second counter having an input and an output, the input of the second counter coupled to the input of the first counter.

8. The lead angle adjustment circuit of claim 7 , further including:

a start determination circuit having an input and an output, the input of the start determination circuit coupled to the output of the second counter; and

an advance angle calculation circuit having an input and an output, the input of the advance angle calculation circuit coupled to the output of the second counter and the output of the advance angle calculation circuit coupled to a second input of the addition circuit.

9. The lead angle adjustment circuit of claim 8 , further including a pseudo FG generator circuit having an input and an output, the input of the pseudo FG generator circuit coupled to the output of the subtractor circuit.

10. A lead angle adjustment circuit, comprising:

a first counter having an input and an output;

a multiplier circuit having an input and an output, the input of the multiplier circuit coupled to the output of the first counter;

a subtractor circuit having a first input, a second input, and an output, the first input of the subtractor circuit coupled to the output of the multiplier circuit;

a storage register having an input and an output, the input of the storage register coupled to the output of the first counter;

a slope determination circuit having a first input, a second input, and an output, the first input of the slope determination circuit coupled to the output of the register and the second input of the slope determination circuit coupled to a first pin of the lead angle adjustment circuit;

a multiplier determination circuit having a first input, a second input, and an output, the output of the multiplier circuit coupled to the second input of the subtractor circuit and the second input of the multiplier determination circuit coupled to a second pin; and

an addition circuit having a first input, a second input, and an output, the output of the addition circuit coupled to the second input of the subtractor circuit.

11. The lead angle adjustment circuit of claim 10 , further including a pseudo FG generator circuit having an input and an output, the input of the pseudo FG generator circuit coupled to the output of the subtractor circuit.

12. The angle adjustment circuit of claim 11 , wherein the slope determination circuit further includes a third input, and further including a range determination circuit having an input and an output, the input of the range determination circuit coupled to the output of the register and the output of the range determination circuit coupled to the third input of the slope determination circuit.

13. The lead angle determination circuit of claim 12 , further including a first voltage divider network coupled to the first pin and a second voltage divider network coupled to the second pin.

14. The lead angle adjustment circuit of claim 13 , wherein the first voltage divider network comprises:

a first resistor having a first terminal and a second terminal, the first terminal of the first resistor coupled to the first pin and the second terminal of the first resistor coupled for receiving a first source of operating potential;

a second resistor having a first terminal and a second terminal, the first terminal of the second resistor coupled to the first pin and the second terminal of the second resistor coupled for receiving a second source of operating potential; and the second voltage divider network comprises:

a third resistor having a first terminal and a second terminal, the first terminal of the third resistor coupled to the second pin and the second terminal of the third resistor coupled for receiving the first source of operating potential; and

a fourth resistor having a first terminal and a second terminal, the first terminal of the fourth resistor coupled to the second pin and the second terminal of the fourth resistor coupled for receiving the second source of operating potential.

15. The lead angle adjustment circuit of claim 12 , further including:

a first resistor having a first terminal and a second terminal, the first terminal of the first resistor coupled to the first pin and the second terminal of the first resistor coupled for receiving a first source of potential; and

a second resistor having a first terminal and a second terminal, the first terminal of the second resistor coupled to the second pin and the second terminal of the second resistor coupled for receiving the first source of operating potential.

16. A lead angle adjustment circuit, comprising:

a first counter having an input and an output;

a second counter having an input and an output, the input of the first counter coupled to the input of the second counter;

a start determination circuit having an input and an output, the input of the start determination circuit coupled to the output of the second counter;

an advance angle calculation circuit having an input and an output, the input of the advance angle calculation circuit coupled to the output of the start determination circuit;

an addition circuit having a first input, a second input, and an output, the first input of the addition circuit coupled to the output of the advance angle calculation circuit;

a multiplier circuit having an input and an output, the input of the multiplier circuit coupled to the output of the first counter; and

a subtractor circuit having a first input, a second input, and an output, the first input of the subtractor circuit coupled to the output of the multiplier circuit and the second input of the subtractor circuit coupled to the output of the addition circuit.

17. The lead angle adjustment circuit of claim 16 , further including a pseudo FG generator circuit having an input coupled to the output of the subtractor circuit.

18. The lead angle adjustment circuit of claim 16 , further including:

a storage register having an input and an output, the input of the storage register coupled to the output of the first counter;

a range determination circuit having an input coupled to the output of the storage register, and an output coupled to the first input of the slope determination circuit;

a slope determination circuit having a first input, a second input, a third input, and an output, the first input of the slope determination circuit coupled to the output of the range determination circuit and the third input of the slope determination circuit coupled to the output of the storage register; and

a multiplier determination circuit having a first input, a second input, and an output, the output coupled to the second input of the subtractor circuit.

19. The lead angle adjustment circuit of claim 18 , wherein the second inputs of the slope determination circuit and the multiplier determination circuit are coupled for receiving first and second control signals, respectively.

20. The lead angle adjustment circuit of claim 18 , wherein the input of the first counter and the input of the second counter are coupled for receiving a comparison signal derived from a Hall sensor.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 051145, FRAME 0062 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064079/0474 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXCLUSION OF FAIRCHILD SEMICONDUCTOR CORPORATION OF CONVEYING PARTY PREVIOUSLY RECORDED ON REEL 051145 FRAME 0062. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Dec 3, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051170/0781 →
SECURITY INTEREST Recorded Nov 26, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051145/0062 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2019
From: OGAWA, TAKASHI
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 050473/0392 →