IP Library Granted Patent US 10,720,915
Granted Patent B2
US 10,720,915 · App. 16/582,955 · Granted Jul 21, 2020

Adaptive gate driver

Inventors: Zhiwei Liu (Fremont, CA); Marc Dagan (Mountain View, CA); Xudong Huang (Fremont, CA)
Assignee: Semiconductor Components Industries, LLC
H03K17/0822H02M1/08H02M3/158G05F1/562G05F1/573H02M2001/0009H03K2217/0063H03K2217/0072
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Quick Facts
Patent No.
US 10,720,915
App. No.
16/582,955
Granted
Jul 21, 2020
Kind
B2
Abstract

An adaptive gate driver for a driving a power MOSFET to switch is disclosed. The adaptive gate driver includes a load sense circuit to sense a current through the power MOSFET. A controller coupled to the load sense circuit compares the sensed current to a threshold to determine if the load on the power MOSFET is a normal load or a heavy load. Based on the comparison, the controller controls the gate driver to drive the power MOSFET with a first strength level when a normal load determined and at second strength level when a heavy load is determined. The driving strength in the heavy-load condition is lower than the normal-load condition and by lowering the driving strength of the gate driver during the heavy-load condition a voltage across the power MOSFET may be prevented from exceeding a threshold related to a breakdown condition during a switching period.

Claims (35)

1. A multiphase power stage comprising:

a plurality of phases, each phase including a gate driver circuit connected to a gate of a switching device;

a load sense circuit configured to detect a heavy-load condition or a normal-load condition on the multiphase power stage; and

a controller coupled to the load sense circuit and the gate driver circuit of each of the phases, the controller configured to control each gate driver circuit to extend a switching period of the switching device when a heavy-load condition is detected to reduce a voltage ringing across the switching device.

2. The multiphase power stage according to claim 1 , wherein the switching device is a power metal oxide semiconductor field effect transistor (MOSFET).

3. The multiphase power stage according to claim 1 , wherein the voltage ringing is reduced to a level below a breakdown voltage of the switching device.

4. The multiphase power stage according to claim 1 , wherein to extend the switching period, each gate driver circuit is configured to lower a driving strength during the switching period.

5. The multiphase power stage according to claim 4 , wherein each gate driver circuit comprises two transistors connected in parallel to the gate of the switching device.

6. The multiphase power stage according to claim 5 , wherein both transistors are turned on at a start of the switching period and the driving strength is lowered by turning one of the transistors off at a time during the switching period.

7. The multiphase power stage according to claim 6 , wherein the two transistors include a larger transistor and a smaller transistor, the larger transistor turned off during the switching period.

8. The multiphase power stage according to claim 6 , wherein the time corresponds to a Miller plateau region of the switching period of the switching device.

9. The multiphase power stage according to claim 1 , wherein the controller is configured to control each gate driver circuit to not extend a switching period of the switching device when the normal-load condition is detected.

10. The multiphase power stage according to claim 9 , wherein each gate driver circuit comprises two transistors connected in parallel to the gate of the switching device and wherein both transistors are turned on at a start of the switching period and are on for the switching period so that a drive strength is not lowered during the switching period.

11. The multiphase power stage according to claim 1 , wherein to detect a heavy-load condition the load sense circuit is configured to sense a current at an output of the multiphase power stage and compare the current to a load threshold.

12. A method for switching a multiphase power stage, the method comprising:

sensing a current at an output of the multiphase power stage;

comparing the sensed current to a load threshold to detect a heavy-load condition; and

upon detecting the heavy-load condition, controlling gate driver circuits in each phase of the multiphase power stage to extend a switching period of a switching device in the phases in order to reduce a voltage overshoot across the switching device.

13. The method for switching a multiphase power stage according to claim 12 , wherein the voltage overshoot across the switching device is reduced below a breakdown voltage of the switching device.

14. The method for switching a multiphase power stage according to claim 12 , wherein the controlling gate driver circuits in each phase of the multiphase power stage to extend the switching period of a switching device, comprises for each phase:

reducing a driving strength of the gate driver circuits during a switching period of the switching device.

15. The method for switching a multiphase power stage according to claim 14 , wherein the gate driver circuit of each phase includes two transistors coupled to a gate of the switching device, and the driving strength when both of the two transistors are in an on state is greater than the driving strength when one of the two transistors is in an on state and one of the two transistors in in an off state.

16. The method for switching a multiphase power stage according to claim 15 , wherein reducing a driving strength of the gate driver circuits during a switching period of the switching device comprises:

switching one of the two transistors driving the switching device from an on state to an off state at a time during the switching period.

17. The method for switching a multiphase power stage according to claim 16 , wherein the time corresponds to a miller plateau region of the switching period of the switching device.

18. The method for switching a multiphase power stage according to claim 12 , further comprising:

comparing the sensed current to a load threshold to detect a normal-load condition; and

upon detecting the normal-load condition, controlling gate driver circuits in each phase of the multiphase power stage not to extend the switching period of the switching device in the phases in order to maintain a switching speed in the normal-load condition that is faster than a switching speed in the heavy-load condition.

19. A system including:

a processor, configured to operate in a normal-load condition or a heavy-load condition; and

a multiphase power stage configured to provide power to the processor, the multiphase power stage including:

a plurality of phases, each phase including a gate driver circuit connected to a gate of a switching device;

a load sense circuit configured to detect that the processor is operating in the normal-load condition or the heavy-load condition; and

a controller coupled to the load sense circuit and the gate driver circuit of each of the phases, the controller configured to control each gate driver circuit to extend a switching period of the switching device when the heavy-load condition is detected to reduce a voltage ringing across the switching device.

20. The system according to claim 19 , wherein each gate driver circuit comprises two transistors connected in parallel to the gate of the switching device; and to extend a switching period of the switching device in the heavy-load condition, both transistors are turned on at a start of the switching period and one of the transistors is turned off at a time during the switching period.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 051145, FRAME 0062 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064079/0474 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXCLUSION OF FAIRCHILD SEMICONDUCTOR CORPORATION OF CONVEYING PARTY PREVIOUSLY RECORDED ON REEL 051145 FRAME 0062. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Dec 3, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051170/0781 →
SECURITY INTEREST Recorded Nov 26, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051145/0062 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2019
From: LIU, ZHIWEI; DAGAN, MARC; HUANG, XUDONG
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 050491/0297 →