Semiconductor device and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a dielectric structure disposed over the substrate; a bit line bottom contact disposed in the dielectric structure; a composite decoupling structure disposed between the dielectric structure and the bit line bottom contact, wherein the composite decoupling structure comprises an air gap and a dielectric spacer; a bit line top contact disposed over the bit line bottom contact; and a bit line to disposed over the bit line top contact.
1. A semiconductor device, comprising:
a substrate;
a dielectric structure disposed over the substrate;
a bit line bottom contact disposed in the dielectric structure;
a composite decoupling structure disposed between the dielectric structure and the bit line bottom contact, wherein the composite decoupling structure comprises an air gap and a dielectric spacer;
a bit line top contact disposed over the bit line bottom contact; and
a bit line disposed over the bit line top contact;
wherein a width of a bottom of the bit line top contact is less than a width of a top surface of the bit line bottom contact.
2. The semiconductor device of claim 1 , further comprising a liner disposed between the bit line bottom contact and the air gaps.
3. The semiconductor device of claim 1 , wherein the bit line is asymmetrically disposed over the bit line top contact.
4. The semiconductor device of claim 1 , wherein a width of a top surface of the bit line top contact is greater than a width of a bottom of the bit line top contact.
5. The semiconductor device of claim 1 , wherein a width of the bit line is greater than a top surface of the bit line top contact.
6. The semiconductor device of claim 1 , wherein the air gap is disposed between the dielectric spacer and the dielectric structure.
7. The semiconductor device of claim 1 , wherein the air gap has a spacer profile.
8. The semiconductor device of claim 1 , further comprising a capacitor contact adjacent to the bit line bottom contact, wherein the capacitor contact comprises a doped polysilicon layer, a cobalt silicide layer disposed over the doped polysilicon layer, and a tungsten contact disposed over the cobalt silicide layer.
9. A method for fabricating a semiconductor device, comprising:
forming a dielectric structure over a substrate;
forming a bit line bottom contact in the dielectric structure;
forming a composite decoupling structure between the dielectric structure and the bit line bottom contact, wherein the composite decoupling structure comprises an air gap and a dielectric spacer;
forming a bit line top contact over the bit line bottom contact; and
forming a bit line over the bit line top contact;
wherein a width of a bottom of the bit line top contact is less than a width of a top surface of the bit line bottom contact.
10. The method of claim 9 , further comprising: forming a liner between the bit line bottom contact and the air gaps.
11. The method of claim 9 , wherein the bit line is asymmetrically disposed over the bit line top contact.
12. The method of claim 9 , wherein a width of a top surface of the bit line top contact is greater than a width of a bottom of the bit line top contact.
13. The method of claim 9 , wherein a width of the bit line is greater than a top surface of the bit line top contact.
14. The method of claim 9 , wherein the air gap is formed between the dielectric spacer and the dielectric structure.
15. The method of claim 9 , further comprising: forming a capacitor contact adjacent to the bit line bottom contact, wherein the capacitor contact comprises a doped polysilicon layer, a cobalt silicide layer disposed over the doped polysilicon layer, and a tungsten contact disposed over the cobalt silicide layer.