Display device

1. A display device, comprising:

a first data line on a first interlayer insulating layer over a substrate;

a first power line and a second power line on a second interlayer insulating layer, the second interlayer insulating layer covering the first data line; and

a plurality of pixels, a first pixel among the plurality of pixels including:

a display element including a pixel electrode, an opposite electrode, and an intermediate layer between the pixel electrode and the opposite electrode, the second power line being connected to the opposite electrode; and

a driving thin film transistor between the substrate and the display element and including a driving semiconductor layer, a driving gate electrode, a driving source electrode, and a driving drain electrode,

the first interlayer insulating layer covering the driving gate electrode, and

the first power line being connected to the driving source electrode,

wherein at least one of the first power line and the second power line overlaps the first data line, and

wherein widths of the first power line and the second power line in a first direction are greater than a width of the first data line in the first direction.

2. The display device as claimed in claim 1 , further comprising:

a storage capacitor including a first electrode and a second electrode, wherein:

the first electrode extends from the driving gate electrode, and

the second electrode is on the first interlayer insulating layer and overlapping the first electrode.

3. The display device as claimed in claim 2 , further comprising:

a bias electrode between the substrate and the driving semiconductor layer and overlapping the driving semiconductor layer.

4. The display device as claimed in claim 3 , further comprising:

a sensing thin film transistor over the substrate and including a sensing semiconductor layer, a sensing gate electrode, a sensing source electrode, and a sensing drain electrode, wherein

the bias electrode is electrically connected to the sensing source electrode.

5. The display device as claimed in claim 3 , wherein:

the bias electrode overlaps the storage capacitor,

the first electrode and the second electrode constitute a first capacitance, and

the bias electrode and the first electrode constitute a second capacitance.

6. The display device as claimed in claim 1 , further comprising:

a planarization layer covering the first power line and the second power line, wherein:

the pixel electrode is on the planarization layer and is electrically connected to the driving thin film transistor through a first via hole defined in the planarization layer, and

the second power line is connected to the opposite electrode through a second via hole defined in the planarization layer.

7. The display device as claimed in claim 6 , wherein an area of the second via hole is greater than an area of the first via hole.

8. The display device as claimed in claim 6 , wherein the pixel electrode includes a groove corresponding to a shape of the second via hole.

9. The display device as claimed in claim 1 , further comprising:

a second pixel that neighbors the first pixel; and

a second data line over the first pixel and the second pixel and in the same layer as a layer of the first data line, wherein:

the first data line is electrically connected to the first pixel, and

the second data line is electrically connected to the second pixel.

10. The display device as claimed in claim 1 , wherein the pixel electrode overlaps the driving thin film transistor and includes a reflective layer.

11. The display device as claimed in claim 1 , wherein:

the pixel electrode does not overlap the driving thin film transistor, and

the opposite electrode includes a reflective layer.

12. The display device as claimed in claim 1 , wherein the driving semiconductor layer includes an oxide semiconductor.

13. The display device as claimed in claim 1 , further comprising:

a switching thin film transistor over the substrate; and

a lower metal layer between the substrate and the switching thin film transistor.

14. A display device including a plurality of pixel circuits over a substrate, and a plurality of display elements respectively connected to the plurality of pixel circuits to implement an image, the display device comprising:

a scan line extending in a first direction and connected to the plurality of pixel circuits arranged in the first direction;

a first data line, a second data line, and a reference voltage line, each extending in a second direction that intersects with the first direction, arranged over the scan line with a first interlayer insulating layer therebetween; and

a first power line and a second power line, each extending in the second direction, arranged over the first data line, the second data line, and the reference voltage line with a second interlayer insulating layer therebetween, the first power line being electrically connected to a pixel electrode of the plurality of display elements, and the second power line being connected to an opposite electrode of the plurality of display elements,

wherein at least one of the first power line and the second power line overlaps the first data line, and

wherein widths of the first power line and the second power line in a first direction are greater than a width of the first data line in the first direction.

15. The display device as claimed in claim 14 , wherein the first data line and the second data line are alternately connected to the plurality of pixel circuits arranged in the second direction.

16. The display device as claimed in claim 14 , wherein:

the plurality of pixel circuits include a first pixel circuit, a second pixel circuit, and a third pixel circuit that neighbor each other in the first direction, and

the first power line overlaps a portion of the first pixel circuit, an entire region of the second pixel circuit, and a portion of the third pixel circuit.

17. The display device as claimed in claim 14 , wherein:

the second power line is connected to the opposite electrode through a via hole defined in a planarization layer, and

the via hole overlaps the reference voltage line.

18. The display device as claimed in claim 14 , wherein:

the reference voltage line is connected to a reference voltage connection line extending in the first direction through a contact hole, and

the reference voltage connection line is connected in common to three pixel circuits that neighbor each other.

19. The display device as claimed in claim 14 , wherein each of the pixel circuits includes three thin film transistors and one storage capacitor.