Trench-based optical components for photonics chips
Structures including a waveguide core and methods of fabricating a structure that includes a waveguide core. A dielectric layer including a trench with a first sidewall and a second sidewall, and a waveguide core positioned inside the trench between the first and second sidewalls of the trench. The waveguide core has a first width, and the trench has a second width between the first and second sidewalls that is greater than the first width.
1. A structure comprising:
a first dielectric layer including a trench with a first sidewall and a second sidewall;
a second dielectric layer below the first dielectric layer;
a first waveguide core positioned inside the trench between the first sidewall and the second sidewall of the trench; and
a second waveguide core in the second dielectric layer,
wherein the first waveguide core has a first width, and the trench has a second width between the first sidewall and the second sidewall that is greater than the first width.
2. The structure of claim 1 wherein the second width of the trench is equal to about 1 to about 3 times a wavelength of light that will be guided by the first waveguide core.
3. The structure of claim 1 wherein the first waveguide core is symmetrically positioned between the first sidewall and the second sidewall of the trench.
4. The structure of claim 1 wherein the second waveguide core is positioned directly below the first waveguide core.
5. The structure of claim 1 wherein the second waveguide core is laterally offset from the first waveguide core.
6. The structure of claim 1 further comprising:
a multilayer stack arranged between the first waveguide core and the second waveguide core, the multilayer stack including a third dielectric layer comprised of a first dielectric material and a fourth dielectric layer comprised of a second dielectric material having a different composition than the first dielectric material.
7. The structure of claim 1 wherein the first waveguide core is comprised of silicon nitride.
8. The structure of claim 7 wherein the second waveguide core is comprised of single-crystal silicon.
9. The structure of claim 1 wherein the first dielectric layer has a thickness of about 50 nanometers to about 500 nanometers.
10. A structure comprising:
a dielectric layer including a trench with a first sidewall and a second sidewalk; and
a waveguide core positioned inside the trench between the first sidewall and the second sidewall of the trench,
wherein the first waveguide core is comprised of silicon nitride, the waveguide core has a first width, and the trench has a second width between the first sidewall and the second sidewall that is greater than the first width.
11. The structure of claim 1 wherein the first waveguide core is positioned in a first region of a substrate, and further comprising:
a field-effect transistor positioned in a second region of the substrate,
wherein the trench in the first dielectric layer is positioned over the first region of the substrate, and the first dielectric layer is positioned over the field-effect transistor in the second region of the substrate.
12. A method comprising:
forming a first dielectric layer and a second dielectric layer below the first dielectric layer;
forming a trench in the first dielectric layer that includes a first sidewall and a second sidewall;
forming a first waveguide core that is positioned inside the trench between the first sidewall and the second sidewall of the trench; and
forming a second waveguide core in the second dielectric layer,
wherein the first waveguide core has a first width, and the trench has a second width between the first sidewall and the second sidewall that is greater than the first width.
13. The method of claim 12 wherein the second waveguide core is positioned directly below the first waveguide core.
14. The method of claim 12 wherein forming the first waveguide core that is positioned inside the trench between the first sidewall and the second sidewall of the trench comprises:
depositing a layer that fills the trench; and
patterning the layer to form the first waveguide core.
15. The method of claim 14 wherein the layer is comprised of silicon nitride.
16. The method of claim 14 wherein the first waveguide core is formed in a first region of a substrate, the layer is patterned using an etching process, and further comprising:
forming a field-effect transistor in a second region of the substrate,
wherein the trench in the first dielectric layer is positioned over the first region of the substrate, and the first dielectric layer is positioned over the field-effect transistor in the second region of the substrate during the etching process.
17. The method of claim 12 wherein the second width of the trench is equal to about 1 to about 3 times a wavelength of light that will be guided by the first waveguide core, and the first waveguide core is symmetrically positioned between the first sidewall and the second sidewall of the trench.
18. The method of claim 14 wherein a first residual rail and a second residual rail comprised of a material of the layer are respectively formed adjacent to the first sidewall and the second sidewall of the trench when the layer is patterned to form the first waveguide core, and the second width of the trench is equal to about 1 to about 3 times a wavelength of light that will be guided by the first waveguide core.
19. The structure of claim 1 wherein the first dielectric layer is comprised of silicon dioxide.
20. The structure of claim 10 wherein the dielectric layer is comprised of silicon dioxide.