IP Library Granted Patent US 11,550,476
Granted Patent B2
US 11,550,476 · App. 16/598,894 · Granted Jan 10, 2023

Extended utilization area for a memory device

Inventors: Jani Hyvonen (Tampere, FI); Kimmo J. Mylly (Ylojarvi, FI); Jussi Hakkinen (Tampere, FI); Yevgen Gyl (Tampere, FI)
Assignee: Memory Technologies LLC
G06F3/061G06F3/0659G06F3/0673G06F12/0646G06F12/1458G06F13/1694G06F13/28G11C7/20G06F12/1433G06F12/1441G06F21/79G06F2212/1052Y02D10/00
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Quick Facts
Patent No.
US 11,550,476
App. No.
16/598,894
Granted
Jan 10, 2023
Kind
B2
Abstract

Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with a type of access. For example, when an application with specific memory access needs is initiated, the memory access profile that is designed for that particular access need may be utilized to configure access to the memory device. The configuration may apply to a portion of the memory device, a partition of the memory device, a single access location on the memory device, or any combination thereof.

Claims (35)

1. A memory device comprising:

physical memory configured to be accessed according to a plurality of access types including at least two or more of a random write access mode, a sequential write access mode, a sequential read access mode, and a random read access mode;

a register that is settable with information indicating a current access type;

a communications interface configured to receive a command from a host device indicating an access need; and

a controller configured to:

receive, from the host device via the communications interface, the command, wherein the command activates a particular access type of the plurality of access types for access to at least a portion of the physical memory;

update the register with the particular access type as the current access type; and

configure, based at least in part on the command and the indication, access to the at least the portion of the physical memory according to the particular access type.

2. The memory device of claim 1 , wherein the command includes a metadata portion designating the particular access type.

3. The memory device of claim 1 , wherein the portion of the memory device remains configured according to the particular access type until a new command indicating a second particular access type is received.

4. The memory device of claim 1 , wherein the information comprises one or more bits that have been set to invoke the particular access type.

5. The memory device of claim 1 , wherein the command comprises information settable to designate the at least the portion of the physical memory that is configured according to the particular access type.

6. The memory device of claim 1 , wherein the particular access type is used to access the at least the portion of the physical memory for more than one usage.

7. The memory device of claim 1 , wherein the particular access type comprises the random write mode.

8. The memory device of claim 1 , wherein the particular access type comprises the random read mode.

9. The memory device of claim 1 , wherein configuring access to the at least the portion of the physical memory according to the particular access type comprises replacing a default access type with the particular access type.

10. A method comprising:

receiving, at a memory device and from a host, a command that activates a particular access type of a plurality of access types including at least two or more of a random write access mode, a sequential write access mode, a sequential read access mode, and a random read access mode, the command indicating at least a portion of physical memory of the memory device that is to be configured for the particular access type;

updating, by a controller of the memory device and based at least in part on the command, a register to indicate the particular access type as a current access type; and

configuring, by the controller of the memory device and based at least in part on the command, access to the at least the portion of the physical memory in accordance with the particular access type as one of the random write access mode, the sequential write access mode, the sequential read access mode, or the random read access mode.

11. The method of claim 10 , wherein the command comprises information settable to invoke the particular access type, the information comprising one or more bits that invoke the particular access type.

12. The method of claim 10 , wherein the command comprises information settable to designate the at least the portion of the physical memory that is configured according to the particular access type.

13. The method of claim 10 , wherein the particular access type is used to access the at least the portion of the physical memory for more than one usage.

14. The method of claim 10 , wherein the particular access type comprises the random read access mode.

15. The method of claim 10 , wherein the particular access type comprises the random write access mode.

16. The method of claim 10 , wherein to configuring access to the at least the portion of the physical memory according to the particular access type comprises replacing a default access type with the particular access type.

17. A host device comprising:

an interface to couple the host device to a memory device; and

a controller capable of:

determining a plurality of access types associated with the memory device, the plurality of access types comprising at least two or more of a random write access mode, a sequential write access mode, a sequential read access mode, and a random read access mode;

identifying a particular access type from the plurality of access types to use to access at least a portion of physical memory of the memory device; and

sending a command to access the at least the portion of the physical memory, wherein the command is to activate the particular access type for the at least the portion of the physical memory, and wherein a register of the memory device is configured to update a register indicating the particular access type.

18. The host device of claim 17 , wherein the particular access type comprises the random read access mode.

19. The host device of claim 17 , wherein the particular access type comprises the random write access mode.

20. The host device of claim 17 , wherein the controller is further capable of setting information in the command to designate the at least the portion of the physical memory that is to be configured according to the particular access type, the information comprising one or more bits.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2019
From: NOKIA CORPORATION
To: NOKIA INC.
Reel/Frame 051213/0444 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2019
From: NOKIA INC.
To: MEMORY TECHNOLOGIES LLC
Reel/Frame 051213/0639 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2019
From: HYVONEN, JANI; MYLLY, KIMMO; HAKKINEN, JUSSI; GYL, YEVGEN
To: NOKIA CORPORATION
Reel/Frame 051225/0741 →
Continuity (6)
Continuation 15181293 · Jun 13, 2016
Continuation 14732507 · Jun 5, 2015
Continuation 13951169 · Jul 25, 2013
Continuation 13645588 · Oct 5, 2012
Continuation 12039672 · Feb 28, 2008
Related Publication 20200089403A1 · Mar 19, 2020