SiC substrate, SiC epitaxial wafer, and method of manufacturing the same
A SiC substrate includes a first principal surface, a second principal surface disposed on a side opposite to the first principal surface, and an outer periphery connected to the first principal surface and the second principal surface, wherein a density of composite defects present at a peripheral edge portion of the SiC substrate, in which a hollow portion and a dislocation line extending from the hollow portion are connected to each other is equal to or greater than 0.01 pieces/cm 2 and equal to or less than 10 pieces/cm 2 .
1. A SiC substrate, comprising:
a first principal surface;
a second principal surface disposed on a side opposite to the first principal surface; and
an outer periphery connected to the first principal surface and the second principal surface,
wherein a density of composite defects present at a peripheral edge portion of the SiC substrate, in which a hollow portion and a dislocation line extending from the hollow portion are connected to each other, is equal to or greater than 0.01 pieces/cm 2 and equal to or less than 10 pieces/cm 2 .
2. A SiC epitaxial wafer, comprising:
a SiC epitaxial layer on the SiC substrate according to claim 1 .
3. A method of manufacturing a SiC epitaxial wafer, comprising:
a step of forming a SiC epitaxial layer on the SiC substrate according to claim 1 .
4. A method of manufacturing a SiC epitaxial wafer, comprising:
a substrate selection step of selecting a SiC substrate, which is used in the SiC epitaxial wafer and includes a first principal surface, a second principal surface disposed on a side opposite to the first principal surface, and an outer periphery connected to the first principal surface and the second principal surface,
wherein in the substrate selection step, a density of composite defects present at a peripheral edge portion of the SiC substrate, in which a hollow portion and a dislocation line extending from the hollow portion are connected to each other, is inspected, and a SiC substrate in which the density is equal to or less than a predetermined density is selected.
5. A method of manufacturing a SiC epitaxial wafer, comprising:
a step of preparing a SiC wafer having a size larger than a predetermined size in order to obtain a SiC substrate having the predetermined size; and
a substrate preparation step of preparing a SiC substrate used in the SiC epitaxial wafer, which includes a first principal surface, a second principal surface disposed on a side opposite to the first principal surface, and an outer periphery connected to the first principal surface and the second principal surface,
wherein in the substrate preparation step, a SiC substrate is obtained by hollowing out a central portion of the SiC wafer, while leaving an outer ring portion of the SiC wafer in which a density of composite defects of the outer ring portion is equal to or greater than a predetermined density, the composite defects being configured such that a hollow portion and a dislocation line extending from the hollow portion are connected to each other.