IP Library Granted Patent US 11,037,624
Granted Patent B2
US 11,037,624 · App. 16/600,025 · Granted Jun 15, 2021

Devices for programming resistive change elements in resistive change element arrays

Inventors: Jia Luo (Fremont, CA); Sheyang Ning (Milpitas, CA); Lee E. Cleveland (Santa Clara, CA)
Assignee: Nantero, Inc.
G11C13/0069G11C13/003G11C13/0023G11C13/0038G11C2013/009G11C2013/0092G11C2213/72G11C2213/76G11C2213/79
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Quick Facts
Patent No.
US 11,037,624
App. No.
16/600,025
Granted
Jun 15, 2021
Kind
B2
Abstract

Devices and methods for programming resistive change elements using an electrical stimulus are disclosed. According to some aspects of the present disclosure the devices and methods program at least one resistive change element within at least one resistive change element cell in a resistive change element array using an electrical stimulus having a voltage level greater than a steady state voltage level that can be supplied by a power supply.

Claims (34)

1. An electrical device, comprising:

a resistive change element array comprising a plurality of resistive change element cells, wherein each resistive change element cell comprises a resistive change element, and wherein each resistive change element is adjustable between at least two resistive states;

a control circuit;

a circuit electrically connected to said control circuit, wherein said circuit is configured to receive a signal from said control circuit and generate a first voltage waveform and a second voltage waveform based on said signal, and wherein said first voltage waveform oscillates around a first voltage and said second voltage waveform oscillates around a second voltage; and

an address decoder and driver circuit electrically connected to said resistive change element array, said control circuit, and said circuit, wherein said address decoder and driver circuit is configured to receive signals from said control circuit and electrically connect at least one resistive change element cell in said plurality of resistive change element cells to said circuit based on said signals.

2. The electrical device of claim 1 , wherein each resistive change element cell further comprises a selection device electrically connected to said resistive change element.

3. The electrical device of claim 1 , wherein each resistive change element is selected from the group consisting of a two-terminal nanotube switching element, a phase change memory element, a metal oxide memory element, and a conductive bridge memory element.

4. The electrical device of claim 1 , wherein said address decoder and driver circuit is configured to clamp a maximum voltage of said first voltage waveform.

5. The electrical device of claim 1 , wherein said address decoder and driver circuit is configured to clamp a minimum voltage of said second voltage waveform.

6. An electrical device, comprising:

a resistive change element array comprising a plurality of resistive change element cells, wherein each resistive change element cell comprises a resistive change element, and wherein each resistive change element is adjustable between at least two resistive states;

a control circuit;

a circuit electrically connected to said control circuit, wherein said circuit is configured to receive a signal from said control circuit and generate a first voltage waveform based on said signal, wherein said first voltage waveform oscillates around a first voltage, and wherein said circuit is configured to supply a second voltage; and

an address decoder and driver circuit electrically connected to said resistive change element array, said control circuit, and said circuit, wherein said address decoder and driver circuit is configured to receive signals from said control circuit and electrically connect at least one resistive change element cell in said plurality of resistive change element cells to said circuit based on said signals.

7. The electrical device of claim 6 , wherein each resistive change element cell further comprises a selection device electrically connected to said resistive change element.

8. The electrical device of claim 6 , wherein each resistive change element is selected from the group consisting of a two-terminal nanotube switching element, a phase change memory element, a metal oxide memory element, and a conductive bridge memory element.

9. The electrical device of claim 6 , wherein said address decoder and driver circuit is configured to clamp a maximum voltage of said first voltage waveform.

10. The electrical device of claim 6 , wherein said address decoder and driver circuit is configured to clamp a minimum voltage of said first voltage waveform.

11. An electrical device, comprising:

a resistive change element array comprising a plurality of resistive change element cells, wherein each resistive change element cell comprises a resistive change element, and wherein each resistive change element is adjustable between at least two resistive states;

a circuit configured to generate a first voltage waveform and a second voltage waveform in response to a current stimulus, wherein said first voltage waveform oscillates around a first voltage and said second voltage waveform oscillates around a second voltage; and

an address decoder and driver circuit electrically connected to said resistive change element array and said circuit, wherein said address decoder and driver circuit is configured to electrically connect at least one resistive change element cell in said plurality of resistive change element cells to said circuit to create a current stimulus, and wherein said address decoder and driver circuit is configured to electrically connect at least one resistive change element cell in said plurality of resistive change element cells to said circuit to apply an electrical stimulus formed by at least part of said first voltage waveform and at least part of said second voltage waveform.

12. The electrical device of claim 11 , wherein each resistive change element cell further comprises a selection device electrically connected to said resistive change element.

13. The electrical device of claim 11 , wherein each resistive change element is selected from the group consisting of a two-terminal nanotube switching element, a phase change memory element, a metal oxide memory element, and a conductive bridge memory element.

14. The electrical device of claim 11 , wherein said address decoder and driver circuit is configured to clamp a maximum voltage of said first voltage waveform.

15. The electrical device of claim 11 , wherein said address decoder and driver circuit is configured to clamp a minimum voltage of said second voltage waveform.

16. An electrical device, comprising:

a resistive change element array comprising a plurality of resistive change element cells, wherein each resistive change element cell comprises a resistive change element, and wherein each resistive change element is adjustable between at least two resistive states;

a circuit configured to generate a first voltage waveform in response to a current stimulus, wherein said first voltage waveform oscillates around a first voltage, and wherein said circuit is configured to supply a second voltage; and

an address decoder and driver circuit electrically connected to said resistive change element array and said circuit, wherein said address decoder and driver circuit is configured to electrically connect at least one resistive change element cell in said plurality of resistive change element cells to said circuit to create a current stimulus, and wherein said address decoder and driver circuit is configured to electrically connect at least one resistive change element cell in said plurality of resistive change element cells to said circuit to apply an electrical stimulus formed by at least part of said first voltage waveform and said second voltage.

17. The electrical device of claim 16 , wherein each resistive change element cell further comprises a selection device electrically connected to said resistive change element.

18. The electrical device of claim 16 , wherein each resistive change element is selected from the group consisting of a two-terminal nanotube switching element, a phase change memory element, a metal oxide memory element, and a conductive bridge memory element.

19. The electrical device of claim 16 , wherein said address decoder and driver circuit is configured to clamp a maximum voltage of said first voltage waveform.

20. The electrical device of claim 16 , wherein said address decoder and driver circuit is configured to clamp a minimum voltage of said first voltage waveform.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Jul 8, 2021
From: SILICON VALLEY BANK
To: NANTERO, INC.
Reel/Frame 056790/0001 →
RELEASE OF SECURITY INTEREST Recorded Jul 7, 2021
From: SILICON VALLEY BANK
To: NANTERO, INC.
Reel/Frame 056773/0625 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2021
From: LUO, JIA; NING, SHEYANG; CLEVELAND, LEE E.
To: NANTERO, INC.
Reel/Frame 056127/0250 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Nov 11, 2020
From: NANTERO, INC.
To: SILICON VALLEY BANK
Reel/Frame 054383/0632 →