High electron mobility transistor
A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, a barrier layer on the buffer layer, a gate electrode on the barrier layer, a first passivation layer adjacent to two sides of the gate electrode, and a p-type semiconductor layer between the gate electrode and the barrier layer. Preferably, a corner of the p-type semiconductor layer contacting a sidewall of the first passivation layer includes a first curve, and a bottom surface of the p-type semiconductor layer directly on the first passivation layer includes a second curve.
1. A high electron mobility transistor (HEMT), comprising:
a buffer layer on a substrate;
a barrier layer on the buffer layer;
a gate electrode on the barrier layer, wherein the gate electrode comprises a first inclined sidewall;
a first passivation layer adjacent to two sides of the gate electrode; and
a p-type semiconductor layer between the gate electrode and the barrier layer, wherein a corner of the p-type semiconductor layer contacting a sidewall of the first passivation layer comprises a first curve, the p-type semiconductor layer comprises a U-shape, the U-shape comprises a horizontal portion, a first vertical portion, and a second vertical portion, a top surface of the horizontal portion and a sidewall of the first vertical portion comprise a right angle, the p-type semiconductor layer comprises a second inclined sidewall not directly contacting the first passivation layer, and the first inclined sidewall is aligned with the second inclined sidewall.
2. The HEMT of claim 1 , wherein the buffer layer comprises a group III-V semiconductor.
3. The HEMT of claim 2 , wherein the buffer layer comprises gallium nitride (GaN).
4. The HEMT of claim 1 , wherein the barrier layer comprises Al x Ga 1-x N.
5. The HEMT of claim 1 , wherein the first passivation layer comprises silicon nitride.
6. The HEMT of claim 1 , further comprising a second passivation layer between the first passivation layer and the barrier layer.
7. The HEMT of claim 6 , wherein the second passivation layer comprises aluminum nitride, aluminum oxide, silicon carbide, or silicon oxynitride.
8. The HEMT of claim 1 , wherein the p-type semiconductor layer comprises p-type gallium nitride (p-GaN).
9. The HEMT of claim 1 , further comprising a field plate adjacent to two sides of the gate electrode and on the first passivation layer.
10. The HEMT of claim 9 , wherein the field plate and the gate electrode comprise a same material.
11. The HEMT of claim 1 , wherein a bottom surface of the p-type semiconductor layer comprises a second curve.
12. A high electron mobility transistor (HEMT), comprising:
a buffer layer on a substrate;
a barrier layer on the buffer layer;
a gate electrode on the barrier layer;
a first passivation layer adjacent to two sides of the gate electrode; and
a p-type semiconductor layer between and directly contacting the first passivation layer, the gate electrode, and the barrier layer, wherein a bottom corner of the p-type semiconductor layer not directly contacting the first passivation layer and the gate electrode and directly on top of the first passivation layer comprises a curve.
13. The HEMT of claim 12 , wherein the buffer layer comprises a group III-V semiconductor.
14. The HEMT of claim 13 , wherein the buffer layer comprises gallium nitride (GaN).
15. The HEMT of claim 12 , wherein the barrier layer comprises Al x Ga 1-x N.
16. The HEMT of claim 12 , wherein the first passivation layer comprises silicon nitride.
17. The HEMT of claim 12 , further comprising a second passivation layer between the first passivation layer and the barrier layer.
18. The HEMT of claim 12 , wherein the p-type semiconductor layer comprises p-type gallium nitride (p-GaN).
19. The HEMT of claim 12 , further comprising a field plate adjacent to two sides of the gate electrode and on the first passivation layer.
20. The HEMT of claim 19 , wherein the field plate comprises an inclined sidewall.