IP Library Granted Patent US 10,991,614
Granted Patent B2
US 10,991,614 · App. 16/606,894 · Granted Apr 27, 2021

Susceptor for holding a semiconductor wafer with an orientation notch during the deposition of a layer on a front side of the semiconductor wafer and method for depositing the layer by using the susceptor

Inventor: Reinhard Schauer (Laufen, DE)
Assignee: Siltronic AG
H01L21/68735C23C16/4585H01L21/68785
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Quick Facts
Patent No.
US 10,991,614
App. No.
16/606,894
Granted
Apr 27, 2021
Kind
B2
Abstract

A susceptor for holding a semiconductor wafer with an orientation notch during deposition of a layer on the wafer comprises a susceptor ring having a placement area for placing the semiconductor wafer in the edge region of a back side of the semiconductor wafer and a step-shaped outer delimitation of the susceptor ring adjoining the placement area. The susceptor has four positions at which the structure differs from the structure at four further positions, the spacing from one of the four positions to the next of the four positions being 90°, the spacing from one of the four positions to the next further position being 45°, one of the four positions being a notch position at which the structure of the susceptor differs from the structure of the susceptor at the three other positions of the four positions of the susceptor.

Claims (12)

1. A susceptor for receiving a semiconductor wafer having an orientation notch during the deposition of a layer on a front side of the semiconductor wafer, comprising:

a susceptor ring and a susceptor base, the susceptor ring comprising a placement area for placing the semiconductor wafer in the edge region of a back side of the semiconductor wafer and a step-shaped outer delimitation of the susceptor ring adjoining the placement area,

wherein the susceptor has four positions arranged radially at which the structure of the susceptor differs from the structure of the susceptor at four further positions arranged radially, the spacing from one of the four positions to the next of the four positions being 90° and the spacing from one of the four positions to the next further position being 45°, one of the four positions being a notch position at which the structure of the susceptor differs from the structure of the susceptor at the three other of the four positions of the susceptor, wherein at the notch position of the susceptor there is a protruberance of the placement area in an inward direction and a protruberance of the outer delimitation in the inward direction, and wherein either

a) a radial width W of the placement area of the susceptor ring at the three other positions of the four positions of the susceptor is less than at the notch position of the susceptor and less than at the further four positions of the susceptor, or

b) a height H of the outer delimitation of the susceptor ring at the three other positions of the four positions of the susceptor is greater than at the notch position of the susceptor and greater than at the further four positions of the susceptor, or

c) a thickness D of the susceptor at the three other positions of the four positions of the susceptor is less than at the notch position of the susceptor and less than at the further four positions of the susceptor, or

d) a radial width B of the outer delimitation of the susceptor ring at the three other positions of the four positions of the susceptor is less than at the notch position of the susceptor and less than at the further four positions of the susceptor, or

e) the outer delimitation of the susceptor ring decreases from a height H 2 to a height H 1 at the three other positions of the four positions of the susceptor from the inner edge of the outer delimitation to the outer edge of the outer delimitation, and stays at the height H 1 at the notch position of the susceptor and the further four positions of the susceptor.

2. The susceptor of claim 1 , wherein, in the state of a semiconductor wafer lying on the placement area, a distance A between an outer edge of the semiconductor wafer and an inner edge of the outer delimitation of the susceptor ring at the three other positions of the four positions of the susceptor is less than at the notch position of the susceptor and less than at the further four positions of the susceptor.

3. A method for depositing a layer on a front side of a semiconductor wafer with an orientation notch, the semiconductor wafer having a <100> orientation, comprising

placing the semiconductor wafer on a susceptor ring of claim 1 such that the orientation notch and the notch position of the susceptor are arranged on a line that is directed toward the middle of the semiconductor wafer;

and coating the front side of the semiconductor wafer in a single-wafer reactor.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE DATE OF THE CHANGE OF ADDRESS FROM 03/12/2020 TO 12/03/2020 PREVIOUSLY RECORDED AT REEL: 056719 FRAME: 0881. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 1, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 057561/0451 →
CHANGE OF ADDRESS Recorded Jun 30, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 056719/0881 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2019
From: SCHAUER, REINHARD
To: SILTRONIC AG
Reel/Frame 050778/0921 →