Phase-change memory device having reversed phase-change characteristics and phase-change memory having highly integrated three-dimensional architecture using same

1. A phase-change memory device comprising:

an upper electrode and a lower electrode;

a phase-change layer in which a crystal state of the phase-change layer is changed by heat supplied by the upper electrode and the lower electrode; and

a selector which selectively switches the heat supplied by the upper electrode and the lower electrode to the phase-change layer,

wherein the selector is formed of a compound which includes a transition metal in a phase-change material, and

the phase-change layer has phase-change characteristics and the selector has reverse phase-change characteristics, such that the selector has a high resistance when a crystal state of the selector is crystalline and a low resistance when the crystal state of the selector is non-crystalline, and the phase-change layer has low resistance when the crystal state of the phase-change layer is crystalline and a high resistance when the crystal state of the phase-change layer is non-crystalline.

2. The phase-change memory device of claim 1 , wherein a composition ratio in which the transition metal is contained in the phase-change material is adjusted to maximize a resistance ratio between when the crystal state of the selector is crystalline and when the crystal state of the selector is non-crystalline, to allow an operating voltage value of the selector to be less than a reference operating voltage value, or to allow a power consumption of the selector to be less than a reference power consumption value.

3. The phase-change memory device of claim 1 , wherein the phase-change memory device,

performs a set operation of a write operation in response to the crystal state of the selector being changed to crystalline to be set to a high resistance state and the crystal state of the phase-change layer being changed to crystalline to be set to a low resistance state, and

performs a reset operation of the write operation in response to the crystal state of the selector being changed to non-crystalline to be set to a low resistance state and the crystal state of the phase-change layer being changed to non-crystalline to be set to a high resistance state.

4. The phase-change memory device of claim 3 , wherein the selector maintains an off state in response to the phase-change memory device being set to the high resistance state in both the set operation and the reset operation.

5. The phase-change memory device of claim 1 , wherein the phase-change memory device performs a read operation in response to a crystal state of a local region being changed from non-crystalline to crystalline to be set to an off state after the crystal state of the local region is changed from crystalline to non-crystalline to be set to an on state.

6. The phase-change memory device of claim 1 , further comprising:

a tunnel barrier disposed between the phase-change layer and the selector to reduce an off current of the selector or block intermixing between the phase-change layer and the selector.

7. The phase-change memory device of claim 1 , wherein the transition metal includes at least one of Cr, Ti, Ni, Zn, Cu, or Mo, and

wherein the phase-change material includes Ge and/or Te.

8. The phase-change memory device of claim 1 , wherein the selector adjusts contact resistivity based on a material forming either the upper electrode or the lower electrode.

9. A selector used in a memory device, wherein the selector is formed of a compound containing a transition metal in a phase-change material to have a high resistance when a crystal state of the selector is crystalline and to have a low resistance when the crystal state of the selector is non-crystalline,

wherein the selector changes a crystal state of a local region between crystalline and non-crystalline to be switched between an on state and an off state.

10. The selector of claim 9 , wherein a composition ratio in which in which the transition metal is contained in the phase-change material is adjusted to maximize a resistance ratio between when the crystal state of the selector is crystalline and when the crystal state of the selector is non-crystalline, to allow an operating voltage value of the selector to be less than a reference operating voltage value, or to allow a power consumption of the selector to be less than a reference power consumption value.

11. The selector of claim 9 , further comprising:

a tunnel barrier disposed between at least one electrode included in the memory device and the selector to reduce an off current of the selector.

12. A phase-change layer used in a phase-change memory device including an upper electrode and a lower electrode, wherein the phase-change layer is formed of a compound containing a transition metal in a phase-change material to change a crystal state by heat supplied by the upper electrode and the lower electrode, to have a high resistance when the crystal state of the phase-change layer is crystalline and to have a low resistance when the crystal state of phase-change layer is non-crystalline,

wherein the phase-change layer changes a crystal state of a local region between crystalline and non-crystalline to be switched between an on state and an off state.

13. The phase-change layer of claim 12 , wherein the phase-change memory device further includes a tunnel barrier disposed between any one of the upper electrode or the lower electrode and the phase-change layer.

14. The phase-change layer of claim 12 , wherein the phase-change memory device further includes an ovonic threshold switching (OTS) selectively switching the heat supplied by the upper electrode and the lower electrode to the phase-change layer.