IP Library Granted Patent US 11,145,773
Granted Patent B2
US 11,145,773 · App. 16/620,616 · Granted Oct 12, 2021

Light receiving element unit

Inventors: Yu Itazaki (Kyoto, JP); Etsuji Omura (Kyoto, JP)
Assignee: Kyoto Semiconductor Co., Ltd.
H01L31/035281H01L25/043H01L31/02005H01L31/028H01L31/02161H01L31/0304
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Quick Facts
Patent No.
US 11,145,773
App. No.
16/620,616
Granted
Oct 12, 2021
Kind
B2
Abstract

The light receiving element unit includes a first light receiving element having a light receiving region on the main surface side of the first semiconductor substrate and a second light receiving element having a light receiving region on the main surface side of the second semiconductor substrate, and a support substrate having wiring for electrically connecting the first light receiving element and the second light receiving element to the outside, one of the first light receiving element and the second light receiving element has a recess formed in a concave shape from the back surface opposite to the light receiving region toward the light receiving region, and the other is accommodated in the recess.

Claims (10)

1. A light receiving element unit comprising a first light receiving element having a light receiving region on a first main surface side of a first semiconductor substrate; a second light receiving element having a light receiving region on a second main surface side of the second semiconductor substrate; and a support substrate having wirings for electrically connecting the first light receiving element and the second light receiving element to an outside, wherein one of the first light receiving element and the second light receiving element has a recess formed in a concave shape from a back surface opposite to the light receiving region toward the light receiving region, and the other is accommodated in the recess.

2. The light receiving element unit according to claim 1 , wherein the first light receiving element and the second light receiving element are arranged such that light transmitted through the light receiving region of the first light receiving element is incident to the light receiving region of the second light receiving element.

3. The light receiving element unit according to claim 1 , wherein the first light receiving element comprises an antireflection layer on an entrance side and an exit side of incident light, respectively.

4. The light receiving element unit according to claim 1 , wherein the first light receiving element has the recess, and a recess side of the first light receiving element is fixed to the support substrate,

the second light receiving element comprises electrodes on the second main surface of the second semiconductor substrate, and the electrodes are fixed to corresponding wirings of the support substrate by solidified conductive member.

5. The light receiving element unit according to claim 1 , wherein the first light receiving element has the recess and intermediate wirings formed on a recess side surface and connected to corresponding wirings of the support substrate, and the recess side surface is fixed to the support substrate,

the second light receiving element has electrodes on the second main surface of the second semiconductor substrate, and the electrodes are fixed to corresponding intermediate wirings of the first light receiving element by a conductive member solidified.

6. The light receiving element unit according to claim 1 , wherein the second light receiving element has the recess and intermediate wirings formed on a recess side surface and connected to corresponding wirings of the support substrate by conductive wires, and an opposite side surface of the recess is fixed to the support substrate,

the first light receiving element has electrodes on the first main surface of the first semiconductor substrate, and the electrodes are connected to corresponding intermediate wirings by conductive wires in a state where an opposite side surface of the electrodes is fixed to the recess side surface.

7. The light receiving element unit according to claim 1 , wherein the first semiconductor substrate is a silicon substrate, and the second semiconductor substrate is an indium phosphide substrate.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2024
From: DEXERIALS PHOTONICS SOLUTIONS CORPORATION
To: DEXERIALS CORPORATION
Reel/Frame 068013/0329 →
CHANGE OF NAME Recorded Jun 26, 2024
From: KYOTO SEMICONDUCTOR CO., LTD.
To: DEXERIALS PHOTONICS SOLUTIONS CORPORATION
Reel/Frame 067877/0479 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2020
From: ITAZAKI, YU; OMURA, ETSUJI
To: KYOTO SEMICONDUCTOR CO., LTD.
Reel/Frame 051703/0852 →
Continuity (1)
Related Publication 20210249547A1 · Aug 12, 2021