IP Library Granted Patent US 11,600,704
Granted Patent B2
US 11,600,704 · App. 16/621,605 · Granted Mar 7, 2023

Nitride semiconductor laminate, semiconductor device, method of manufacturing nitride semiconductor laminate, method of manufacturing nitride semiconductor free-standing substrate and method of manufacturing semiconductor device

Inventor: Hajime Fujikura (Hitachi, JP)
Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
H01L29/2003C30B25/186C30B25/20C30B29/406C30B31/22H01L21/0254H01L21/0262H01L21/266H01L21/26553H01L21/3245H01L29/36H01L29/66143H01L29/872
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Quick Facts
Patent No.
US 11,600,704
App. No.
16/621,605
Granted
Mar 7, 2023
Kind
B2
Abstract

A nitride semiconductor laminate includes: a substrate comprising a group III nitride semiconductor and including a surface and a reverse surface, the surface being formed from a nitrogen-polar surface, the reverse surface being formed from a group III element-polar surface and being provided on the reverse side from the surface; a protective layer provided at least on the reverse surface side of the substrate and having higher heat resistance than the reverse surface of the substrate; and a semiconductor layer provided on the surface side of the substrate and comprising a group III nitride semiconductor. The concentration of O in the semiconductor layer is lower than 1×10 17 at/cm 3 .

Claims (37)

1. A nitride semiconductor laminate comprising:

a substrate comprising a group III nitride semiconductor and including a surface and a reverse surface, the surface being formed from a nitrogen-polar surface, the reverse surface being formed from a group III element-polar surface, the reverse surface being provided on the reverse side from the surface;

a protective layer provided at least on the reverse surface side of the substrate and having higher heat resistance than the reverse surface of the substrate; and

a semiconductor layer provided on the surface side of the substrate and comprising a group III nitride semiconductor, wherein

concentration of 0 in the semiconductor layer is lower than 1×10 17 at/cm 3 .

2. The nitride semiconductor laminate of claim 1 , wherein

the concentration of 0 in the semiconductor layer is lower than 1×10 16 at/cm 3 .

3. The nitride semiconductor laminate of claim 1 , wherein

the concentration of 0 in the semiconductor layer is lower than 5×10 15 at/cm 3 .

4. The nitride semiconductor laminate of claim 1 , wherein

concentration of C in the semiconductor layer is lower than 1×10 17 at/cm 3 .

5. The nitride semiconductor laminate of claim 4 , wherein

the concentration of C in the semiconductor layer is lower than 1×10 16 at/cm 3 .

6. The nitride semiconductor laminate of claim 4 , wherein

the concentration of C in the semiconductor layer is lower than 5×10 15 at/cm 3 .

7. The nitride semiconductor laminate of claim 1 , wherein

concentration of each of B and Fe in the semiconductor layer is lower than 1×10 15 at/cm 3 .

8. The nitride semiconductor laminate of claim 1 , wherein

the protective layer is also provided on a side of a side surface of the substrate.

9. A semiconductor device comprising:

a substrate comprising a group III nitride semiconductor and including a surface and a reverse surface, the surface being formed from a nitrogen-polar surface, the reverse surface being formed from a group III element-polar surface, the reverse surface being provided on the reverse side from the surface, and

a semiconductor layer provided on the surface side of the substrate and comprising a group III nitride semiconductor, wherein

concentration of 0 in the semiconductor layer is lower than 1×10 17 at/cm 3 .

10. The semiconductor device of claim 9 , wherein

the concentration of 0 in the semiconductor layer is lower than 1×10 16 at/cm 3 .

11. The semiconductor device of claim 9 , wherein

the concentration of 0 in the semiconductor layer is lower than 5×10 15 at/cm 3 .

12. The semiconductor device of claim 9 , wherein

concentration of C in the semiconductor layer is lower than 1×10 17 at/cm 3 .

13. The semiconductor device of claim 12 , wherein

the concentration of C in the semiconductor layer is lower than 1×10 16 at/cm 3 .

14. The semiconductor device of claim 12 , wherein

the concentration of C in the semiconductor layer is lower than 5×10 15 at/cm 3 .

15. The semiconductor device of claim 9 , wherein

concentration of each of B and Fe in the semiconductor layer is lower than 1×10 15 at/cm 3 .

16. The semiconductor device of claim 9 , wherein

the semiconductor layer includes an implantation region in which an impurity is implanted.

Assignments (2)
MERGER Recorded Nov 17, 2022
From: SCIOCS COMPANY LIMITED
To: SUMITOMO CHEMICAL COMPANY, LIMITED
Reel/Frame 061961/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2019
From: FUJIKURA, HAJIME
To: SCIOCS COMPANY LIMITED; SUMITOMO CHEMICAL COMPANY, LIMITED
Reel/Frame 051251/0640 →
Priority Claims (1)
JP JP2017-117658 · Jun 15, 2017 · national
Continuity (1)
Related Publication 20200219983A1 · Jul 9, 2020