IP Library Granted Patent US 11,670,659
Granted Patent B2
US 11,670,659 · App. 16/624,205 · Granted Jun 6, 2023

Imaging element, stacked imaging element, and solid-state imaging apparatus

Inventors: Taiichiro Watanabe (Kanagawa, JP); Fumihiko Koga (Kanagawa, JP); Kyosuke Ito (Kanagawa, JP); Hideaki Togashi (Nagasaki, JP); Yusaku Sugimori (Kanagawa, JP)
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
H01L27/14623H01L27/14621H04N25/77
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Quick Facts
Patent No.
US 11,670,659
App. No.
16/624,205
Granted
Jun 6, 2023
Kind
B2
Abstract

An imaging element includes a photoelectric conversion unit including a first electrode 11 , a photoelectric conversion layer 13 , and a second electrode 12 that are stacked, in which the photoelectric conversion unit further includes a charge storage electrode 14 arranged apart from the first electrode 11 and arranged to face the photoelectric conversion layer 13 through an insulating layer 82 , and when photoelectric conversion occurs in the photoelectric conversion layer 13 after light enters the photoelectric conversion layer 13 , an absolute value of a potential applied to a part 13 C of the photoelectric conversion layer 13 facing the charge storage electrode 14 is a value larger than an absolute value of a potential applied to a region 13 B of the photoelectric conversion layer 13 positioned between the imaging element and an adjacent imaging element.

Claims (14)

1. An imaging element comprising:

a photoelectric conversion unit including a first electrode, a photoelectric conversion layer, and a second electrode that are stacked; and

a semiconductor substrate, wherein

the photoelectric conversion unit is arranged on an upper side of the semiconductor substrate, the photoelectric conversion unit further includes a charge storage electrode arranged apart from the first electrode, arranged to face the photoelectric conversion layer through an insulating layer, and arranged between the second electrode and the semiconductor substrate in a depth direction of the semiconductor substrate, and wherein a top of the charge storage electrode is arranged at same level as a top of the first electrode in the depth direction of the semiconductor substrate,

when photoelectric conversion occurs in the photoelectric conversion layer after light enters the photoelectric conversion layer, an absolute value of a potential applied to a part of the photoelectric conversion layer facing the charge storage electrode is a value larger than an absolute value of a potential applied to a region of the photoelectric conversion layer positioned between the imaging element and an adjacent imaging element.

2. The imaging element according to claim 1 , further comprising

a transfer control electrode arranged between the first electrode and the charge storage electrode, arranged apart from the first electrode and the charge storage electrode, and arranged to face the photoelectric conversion layer through the insulating layer.

3. The imaging element according to claim 1 , wherein

the charge storage electrode includes a plurality of charge storage electrode segments.

4. The imaging element according to claim 1 , wherein

the size of the charge storage electrode is larger than the first electrode.

5. A stacked imaging element comprising at least one imaging element according to claim 1 .

6. A solid-state imaging apparatus comprising a plurality of imaging elements according to claim 1 .

7. A solid-state imaging apparatus comprising a plurality of stacked imaging elements according to claim 5 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2020
From: WATANABE, TAIICHIRO; KOGA, FUMIHIKO; ITO, KYOSUKE; TOGASHI, HIDEAKI; SUGIMORI, YUSAKU
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 051591/0762 →
Priority Claims (2)
JP JP2017-121200 · Jun 21, 2017 · national
JP JP2018-115847 · Jun 19, 2018 · national
Continuity (1)
Related Publication 20210288092A1 · Sep 16, 2021
Cited By (1)
US 12,408,455