IP Library Granted Patent US 11,626,037
Granted Patent B2
US 11,626,037 · App. 16/634,955 · Granted Apr 11, 2023

Semiconductor device and display device

Inventors: Shunpei Yamazaki (Tokyo, JP); Yukinori Shima (Gunma, JP); Masami Jintyou (Tochigi, JP)
G09F9/30H01L51/50H01L27/32H01L29/7869
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Quick Facts
Patent No.
US 11,626,037
App. No.
16/634,955
Granted
Apr 11, 2023
Kind
B2
Abstract

A semiconductor device that can be highly integrated is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, and a first conductive layer. The third insulating layer is positioned over the semiconductor layer and includes a first opening over the semiconductor layer. The first conductive layer is positioned over the semiconductor layer, the first insulating layer is positioned between the first conductive layer and the semiconductor layer, and the second insulating layer is provided in a position that is in contact with a side surface of the first opening, the semiconductor layer, and the first insulating layer. The semiconductor layer includes a first portion overlapping with the first insulating layer, a pair of second portions between which the first portion is sandwiched and which overlap with the second insulating layer, and a pair of third portions between which the first portion and the pair of second portions are sandwiched and which overlap with neither the first insulating layer nor the second insulating layer. The first portion has a smaller width than the first opening and has a thinner shape of the semiconductor layer than the second portions, and the second portions have a thinner shape of the semiconductor layer than the third portions.

Claims (57)

1. A semiconductor device comprising:

a semiconductor layer;

a first insulating layer;

a second insulating layer;

a third insulating layer; and

a first conductive layer,

wherein the third insulating layer is positioned over the semiconductor layer,

wherein the third insulating layer comprises a first opening over the semiconductor layer,

wherein the first conductive layer is positioned over the semiconductor layer,

wherein the first insulating layer is positioned between the first conductive layer and the semiconductor layer,

wherein the second insulating layer is provided in a position that is in contact with a side surface of the first opening, the semiconductor layer, and the first insulating layer,

wherein the semiconductor layer comprises:

a first portion overlapping with the first insulating layer;

a pair of second portions between which the first portion is sandwiched and which overlap with the second insulating layer; and

a pair of third portions between which the first portion and the pair of second portions are sandwiched and which overlap with neither the first insulating layer nor the second insulating layer,

wherein the first portion has a smaller width than the first opening,

wherein the first portion has a smaller height than the pair of second portions, and

wherein the pair of second portions have a smaller height than the pair of third portions.

2. The semiconductor device according to claim 1 ,

wherein the semiconductor device comprises a fourth insulating layer in contact with the third portions of the semiconductor layer, and

wherein the fourth insulating layer comprises nitrogen and either or both of aluminum and titanium.

3. The semiconductor device according to claim 1 ,

wherein the second portions comprise a region having a higher carrier density than the first portion and a region having a lower carrier density than the third portions.

4. The semiconductor device according to claim 1 ,

wherein an end portion of the third insulating layer in contact with the second insulating layer has a shape with a taper angle greater than or equal to 80° and less than or equal to 95°.

5. The semiconductor device according to claim 1 ,

wherein the semiconductor device comprises a fifth insulating layer positioned between the first insulating layer and the first conductive layer, and

wherein the fifth insulating layer comprises aluminum or hafnium, and oxygen.

6. The semiconductor device according to claim 1 ,

wherein the semiconductor device comprises a second conductive layer positioned below the semiconductor layer and overlapping with the first conductive layer, and a sixth insulating layer positioned between the semiconductor layer and the second conductive layer.

7. The semiconductor device according to claim 6 ,

wherein the sixth insulating layer comprises a first layer, a second layer, and a third layer which are stacked in this order from the second conductive layer side,

wherein the first layer and the third layer each comprise oxygen, and

wherein the second layer comprises aluminum or hafnium, and oxygen.

8. A display device comprising:

the semiconductor device according to claim 1 , and

a liquid crystal element or a light-emitting element electrically connected to the semiconductor device.

9. A semiconductor device comprising:

a semiconductor layer;

a first insulating layer;

a second insulating layer;

a third insulating layer; and

a first conductive layer,

wherein the third insulating layer is positioned over the semiconductor layer,

wherein the third insulating layer comprises a first opening over the semiconductor layer,

wherein the first conductive layer is positioned over the semiconductor layer,

wherein the first insulating layer is positioned between the first conductive layer and the semiconductor layer,

wherein the second insulating layer is provided in a position that is in contact with a side surface of the first opening, the semiconductor layer, and the first insulating layer,

wherein the semiconductor layer comprises:

a first portion overlapping with the first insulating layer;

a pair of second portions between which the first portion is sandwiched and which overlap with the second insulating layer; and

a pair of third portions between which the first portion and the pair of second portions are sandwiched and which overlap with neither the first insulating layer nor the second insulating layer,

wherein the first portion has a smaller width than the first opening,

wherein the first portion has a smaller height than the pair of second portions,

wherein the pair of second portions have a smaller height than the pair of third portions, and

wherein the first insulating layer is positioned over the pair of third portions.

10. The semiconductor device according to claim 9 , wherein the first insulating layer is provided over the second insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2020
From: YAMAZAKI, SHUNPEI; SHIMA, YUKINORI; JINTYOU, MASAMI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 051655/0565 →
Priority Claims (1)
JP JP2017-151236 · Aug 4, 2017 · national
Continuity (1)
Related Publication 20200211425A1 · Jul 2, 2020