Circuit selector of embedded magnetoresistive random access memory
A circuit selector of embedded magnetoresistive random access memory (EMRAM) includes a transistor comprising a source/drain terminal coupled to a first magnetic tunneling junction (MTJ) and a second MTJ, a gate terminal, and a drain/source terminal coupled to a voltage source. Preferably, the first MTJ includes a first free layer, a first barrier layer, and a first pinned layer, in which the first free layer is coupled to the source/drain terminal and the first pinned layer is coupled to a first circuit. The second MTJ includes a second free layer, a second barrier layer, and a second pinned layer, in which the second pinned layer is coupled to the source/drain terminal and the second free layer is coupled to a second circuit.
1. A circuit selector of embedded magnetoresistive random access memory (EMRAM), comprising:
a transistor comprising:
a source/drain terminal coupled to a first magnetic tunneling junction (MTJ) and a second MTJ, wherein the first MTJ comprises:
a first free layer;
a first barrier layer; and
a first pinned layer;
a first circuit, wherein one end of the first circuit is coupled to the first pinned layer and another end of the first circuit is coupled to ground;
a gate terminal; and
a drain/source terminal coupled to a voltage source.
2. The circuit selector of EMRAM of claim 1 , wherein the first free layer is coupled to the source/drain terminal.
3. The circuit selector of EMRAM of claim 1 , wherein the second MTJ comprises:
a second free layer;
a second barrier layer; and
a second pinned layer.
4. The circuit selector of EMRAM of claim 3 , wherein the second pinned layer is coupled to the source/drain terminal.
5. The circuit selector of EMRAM of claim 3 , wherein the second free layer is coupled to a second circuit.