IP Library Granted Patent US 11,243,419
Granted Patent B2
US 11,243,419 · App. 16/655,816 · Granted Feb 8, 2022

Electro-optic silicon nitride via electric poling

Inventors: Jaime Cardenas (Rochester, NY); Yi Zhang (Rochester, NY)
Assignee: University of Rochester
G02F1/035C23C16/345C23C16/50H01L21/0217H01L21/02274G02F2202/20
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Quick Facts
Patent No.
US 11,243,419
App. No.
16/655,816
Granted
Feb 8, 2022
Kind
B2
Abstract

A deposition method for manufacturing an active electro-optic layer includes providing a substrate or a base layer; and applying an electric field across a silicon nitride layer as it is being deposited on the substrate or the base layer to cause a poling of a deposited layer. Alternative methods for poling an active electro-optic layer and an electro-optical device are also described.

Claims (14)

1. An integrated device or a photonic device including electro-optical structure to be poled during device fabrication comprising:

a substrate or a base layer;

at least one optical waveguide or photonic device comprising at least one electro-optic (EO) optical waveguide or at least one EO photonic device formed from a silicon nitride deposited on said substrate or said base layer;

a first electrode deposited on said substrate or said base layer on a first side of or above said at least one optical waveguide or photonic device, said first electrode to accept a first polarity of a high voltage bias;

a second electrode deposited on a second side of or below said at least one optical waveguide or photonic device, said second electrode to accept a second polarity of said high voltage bias; and

wherein said at least one optical waveguide or photonic device is poled by application of said high voltage bias during production.

2. The integrated device of claim 1 , wherein at least one of said first electrode and said second electrode comprises an ohmic heating element adapted to accept a heating current applied therethrough.

3. The integrated device of claim 1 , wherein said first electrode and said second electrode comprise internal operating terminals of said integrated device.

4. The integrated device of claim 3 , wherein said optical waveguide or photonic device comprises a ring resonator, said first electrode is disposed within said ring resonator, and said second electrode disposed outside of said ring resonator, and said first electrode comprises a circular shape, and said second electrode comprises an annulus shape.

5. The integrated device of claim 1 , wherein said integrated device comprises an integrated silicon nitride optical waveguide or photonic device as part of a CMOS integrated circuit.

6. An electro-optic (EO) silicon nitride device comprising:

a substrate or a base layer;

at least one electro-optic (EO) silicon nitride optical waveguide or at least one EO silicon nitride photonic device comprising a silicon nitride deposited on said substrate or said base layer;

wherein said at least one optical waveguide or said at least one EO photonic device is poled to transform said silicon nitride deposited on said substrate, into an EO silicon nitride.

Assignments (2)
CONFIRMATORY LICENSE Recorded Jun 30, 2021
From: UNIVERSITY OF ROCHESTER
To: NATIONAL SCIENCE FOUNDATION
Reel/Frame 056776/0960 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2020
From: CARDENAS, JAIME; ZHANG, YI
To: UNIVERSITY OF ROCHESTER
Reel/Frame 051627/0353 →
Continuity (2)
Provisional Application 62747250 · Oct 18, 2018
Related Publication 20200124884A1 · Apr 23, 2020