Apparatus for managing power of vehicle and method of controlling the same

1. An apparatus for managing power of a vehicle, the apparatus comprising:

a processor configured to control a bypass path for bypassing an input power or a boosting path for boosting the input power corresponding to an idle mode signal;

a booster configured to boost the input power corresponding to a driving signal to generate an output power;

a control circuit configured to selectively supply a power for operating the booster corresponding to an output signal of the processor in a boost mode; and

a pulse width control circuit configured to control a duty of the driving signal corresponding to an output signal of the control circuit,

wherein the control circuit includes:

a driving controller selectively operated corresponding to a control signal applied from the processor;

a driving device driven corresponding to an output signal of the driving controller to selectively supply a boost voltage corresponding to an output voltage; and

a resistance dividing device configured to resistance-divide the boost voltage to generate a divided voltage.

2. The apparatus of claim 1 , wherein the processor, the booster, the control circuit, and the pulse width control circuit are implemented in an integrated module form.

3. The apparatus of claim 1 , further comprising:

a bypass switch configured to selectively connect the input power and the output power to each other; and

a switching device configured to selectively control a connection of the bypass switch corresponding to control of the processor.

4. The apparatus of claim 1 , further comprising:

a driving device configured to generate the driving signal corresponding to output signals of the pulse width control circuit and the control circuit; and

a boost controller configured to selectively control an operation of the booster corresponding to an output signal of the driving device.

5. The apparatus of claim 1 , wherein the bypass path and the boosting path are complementarily operated.

6. The apparatus of claim 1 , wherein the processor is further configured to activate a bypass enable signal for forming the bypass path when the idle mode signal is inactivated and to activate a control signal for forming the boosting path when the idle mode signal is activated.

7. The apparatus of claim 6 , wherein the processor is further configured to block the bypass path and to enter the boost mode when the idle mode signal is activated and a voltage of the input power is less than a specified voltage.

8. The apparatus of claim 6 , wherein the processor is further configured to inactivate the control signal to block the boosting path when a voltage of the input power is equal to or higher than a specified voltage in the boost mode.

9. The apparatus of claim 1 , wherein the processor is further configured to block the boosting path and to form the bypass path when a voltage of the input power is equal to or less than a specified voltage for a specified time or more.

10. The apparatus of claim 1 , wherein the booster includes:

a plurality of inductors connected in series between an input terminal of the input power and an output terminal of the output power; and

a plurality of capacitors connected between each connecting terminal of the plurality of inductors and a ground voltage terminal.

11. The apparatus of claim 1 , wherein the control circuit further includes a power blocking device configured to selectively control whether to supply the boost voltage corresponding to a fail mode of the processor.

12. The apparatus of claim 11 , wherein the power blocking device is turned on by an ignition signal in a sleep mode of the vehicle to block the boost voltage supplied to the pulse width control circuit.

13. The apparatus of claim 11 , further comprising:

an auxiliary power source configured to generate an auxiliary power for turning on the power blocking device by detecting a failure of the processor.

14. The apparatus of claim 13 , further comprising:

a warning display device configured to indicate whether the processor is failed according to the auxiliary power source.

15. A method of managing power of a vehicle, the method comprising:

supplying an output power to a load of the vehicle corresponding to an input power in a bypass mode;

terminating the bypass mode and activating a boost mode when an idle mode signal is activated and the input power is less than a specified voltage; and

terminating the boost mode and activating the bypass mode when the input power is equal to or higher than the specified voltage,

wherein the supplying an output power to a load of the vehicle corresponding to an input power in a bypass mode includes:

selectively operating corresponding to a control signal;

selectively supplying a boost voltage corresponding to an output voltage; and

resistance-dividing the boost voltage to generate a divided voltage.

16. The method of claim 15 , further comprising:

terminating the boost mode when the input power is equal to or less than the specified voltage for a specified time or more.

17. The method of claim 15 , further comprising:

blocking supply of a boost power and entering the bypass mode when a failure of a processor is sensed in the boost mode.

18. The method of claim 17 , further comprising:

displaying the failure of the processor on a display.

19. The method of claim 15 , further comprising:

controlling a duty of a driving signal by a pulse width modulation operation in the boost mode and boosting the input power corresponding to the driving signal.