IP Library › Granted Patent US 11,354,192
Granted Patent B2
US 11,354,192 · App. 16/671,364 · Granted Jun 7, 2022

Data storage devices and methods for firmware failure prevention

Inventor: Po-Wei Wu (Keelung, TW)
Assignee: SILICON MOTION, INC.
G06F11/1417G06F3/064G06F3/0619G06F3/0652G06F3/0653G06F3/0679G06F9/4406G06F11/362
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Quick Facts
Patent No.
US 11,354,192
App. No.
16/671,364
Granted
Jun 7, 2022
Kind
B2
Abstract

A data storage device including a non-volatile memory and a micro-controller is provided. The non-volatile memory includes a first block and a second block, wherein the first block stores firmware code. The micro-controller writes one predetermined string into the second block before an execution of the firmware code, and determines whether there is more than one predetermined string in the second block. In response to there being no more than one predetermined string in the second block, the micro-controller allows the execution of the firmware code and erases the predetermined string in the second block upon successful completion of a prerequisite procedure during the execution of the firmware code. In response to there being more than one predetermined string in the second block, the micro-controller does not allow the execution of the firmware code.

Claims (34)

1. A data storage device, comprising:

a non-volatile memory, comprising a first block and a second block, wherein the first block stores firmware code; and

a micro-controller, configured to:

write one predetermined string into the second block before an execution of the firmware code;

determine whether there is more than one predetermined string in the second block;

in response to there being no more than one predetermined string in the second block, allow the execution of the firmware code and erase the predetermined string in the second block upon successful completion of a prerequisite procedure during the execution of the firmware code; and

in response to there being more than one predetermined string in the second block, not allow the execution of the firmware code.

2. The data storage device as claimed in claim 1 , wherein the prerequisite procedure comprises a link building procedure of the firmware code.

3. The data storage device as claimed in claim 1 , wherein the non-volatile memory is configured to store a boot code, and the micro-controller is further configured to load and execute the boot code from the non-volatile memory, and the writing of the predetermined string into the second block is performed in response to obtaining an address of where the firmware code is stored in the non-volatile memory during the execution of the boot code.

4. The data storage device as claimed in claim 1 , wherein the micro-controller is further configured to enter a ROM-code mode in response to there being more than one predetermined string in the second block.

5. The data storage device as claimed in claim 1 , wherein the micro-controller is further configured to determine whether to perform a debug procedure or not in response to there being more than one predetermined string in the second block, allow the execution of the firmware code in response to determining to perform the debug procedure, and not allow the execution of the firmware code in response to determining not to perform the debug procedure.

6. The data storage device as claimed in claim 1 , wherein the second block is an idle block.

7. The data storage device as claimed in claim 1 , wherein the writing of the predetermined string into the second block comprises:

selecting one of a plurality of empty pages from the second block; and

writing the predetermined string into the selected empty page.

8. A method for firmware failure prevention, executed by a micro-controller of a data storage device comprising a non-volatile memory, the method comprising:

before loading and executing firmware code from a first block of the non-volatile memory, writing one predetermined string into a second block of the non-volatile memory;

determining whether there is more than one predetermined string in the second block;

in response to there being no more than one predetermined string in the second block, allowing the execution of the firmware code and erasing the predetermined string in the second block upon successful completion of a prerequisite procedure during the execution of the firmware code; and

in response to there being more than one predetermined string in the second block, not allowing the execution of the firmware code.

9. The method as claimed in claim 8 , wherein the prerequisite procedure comprises a link building procedure of the firmware code.

10. The method as claimed in claim 8 , further comprising:

loading and executing boot code from the non-volatile memory;

wherein the writing of the predetermined string into the second block is performed in response to obtaining an address of where the firmware code is stored in the non-volatile memory during the execution of the boot code.

11. The method as claimed in claim 8 , further comprising:

entering a ROM-code mode, in response to there being more than one predetermined string in the second block.

12. The method as claimed in claim 8 , further comprising:

determining whether to perform a debug procedure or not in response to there being more than one predetermined string in the second block;

allowing the execution of the firmware code in response to determining to perform the debug procedure; and

not allowing the execution of the firmware code in response to determining not to perform the debug procedure.

13. The method as claimed in claim 8 , wherein the second block is an idle block.

14. The method as claimed in claim 8 , wherein the writing of the predetermined string into the second block comprises:

selecting one of a plurality of empty pages from the second block; and

writing the predetermined string into the selected empty page.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2019
From: WU, PO-WEI
To: SILICON MOTION, INC.
Reel/Frame 050888/0121 →
Priority Claims (1)
TW 108101611 · Jan 16, 2019 · national
Continuity (1)
Related Publication 20200226026A1 · Jul 16, 2020