Waveguide formation using CMOS fabrication techniques
Conventional approaches to integrating waveguides within standard electronic processes typically involve using a dielectric layer, such as polysilicon, single-crystalline silicon, or silicon nitride, within the in-foundry process or depositing and patterning a dielectric layer in the backend as a post-foundry process. In the present approach, the back-end of the silicon handle is etched away after in-foundry processing to expose voids or trenches defined using standard in-foundry processing (e.g., complementary metal-oxide-semiconductor (CMOS) processing). Depositing dielectric material into a void or trench yields an optical waveguide integrated within the front-end of the wafer. For example, a shallow trench isolation (STI) layer formed in-foundry may serve as a high-resolution patterning waveguide template in a damascene process within the front end of a die or wafer. Filling the trench with a high-index dielectric material yields a waveguide that can guide visible and/or infrared light, depending on the waveguide's dimensions and refractive index contrast.
1. A method of making at least one optical waveguide in a silicon substrate having a front side, a back side, and a first refractive index, the method comprising:
(A) etching the front side of the silicon substrate so as to define a silicon ridge on the front side of the silicon substrate;
(B) depositing a layer of dielectric material having a second refractive index lower than the first refractive index on the ridge and on at least a portion of the front side of the silicon substrate adjacent to the silicon ridge; and
(C) etching a portion of the back side of the silicon substrate so as to expose a portion of the silicon ridge through the silicon substrate from the back side of the silicon substrate.
2. The method of claim 1 , wherein (A) comprises defining the silicon ridge to have a width of about 250 nm or less.
3. The method of claim 1 , wherein (C) comprises chemically-mechanically polishing the back side of the silicon substrate.
4. The method of claim 1 , further comprising, before (C):
defining a pn junction in the silicon ridge.
5. The method of claim 4 , wherein (C) comprises:
electro-chemically etching the back side of the silicon substrate to the pn junction.
6. The method of claim 1 , further comprising, wherein (B) comprises forming a silicide block in the layer of dielectric material.
7. The method of claim 1 , further comprising:
forming an electrical contact in electrical communication with the at least one optical waveguide.
8. The method of claim 1 , wherein the dielectric material comprises at least one of silicon dioxide, silicon nitride, or silicon oxynitride.
9. The method of claim 1 , further comprising:
forming at least one electronic device on the front side of the silicon substrate; and
forming the at least one optical waveguide in optical communication with the at least one electronic device.
10. The method of claim 9 , wherein the at least one electronic device comprises at least one of a transistor, a photodetector, a modulator, or a light source.
11. The method of claim 1 , further comprising:
forming the at least one optical waveguide in optical communication with a grating.
12. The method of claim 1 , further comprising:
forming the at least one optical waveguide in optical communication with a resonator.
13. The method of claim 1 , further comprising:
forming a heater, in thermal communication with the at least one optical waveguide, to heat the at least one optical waveguide.
14. The method of claim 1 , further comprising:
depositing a waveguide core material on the portion of the silicon ridge exposed through the silicon substrate from the back side of the silicon substrate.
15. The method of claim 14 , wherein the waveguide core material comprises at least one of amorphous silicon, silicon nitride, silicon-rich silicon nitride, aluminum oxide, polycrystalline silicon, amorphous silicon germanium, polycrystalline silicon germanium, amorphous silicon carbide, polycrystalline silicon carbide, or silicon oxynitride.
16. The method of claim 14 , wherein the waveguide core material is at least partially transparent at a wavelength in a range from about 400 nm to about 2000 nm.
17. The method of claim 14 , wherein the layer of dielectric material forms a first cladding, and further comprising:
removing excess waveguide core material.
18. The method of claim 14 , further comprising:
coating, texturing, and/or patterning a surface of the waveguide core material.
19. The method of claim 14 , further comprising:
depositing a second cladding on the waveguide core material.
20. The method of claim 14 , wherein the waveguide core material is electro-optic further comprising:
forming an electrical contact in direct contact with the waveguide core material.