IP Library › Granted Patent US 11,322,439
Granted Patent B2
US 11,322,439 · App. 16/681,869 · Granted May 3, 2022

FEOL interconnect used as capacitance over fins instead of gates

Inventors: Michael Sperling (Poughkeepsie, NY); Erik English (Beacon, NY); Akil Khamisi Sutton (Poughkeepsie, NY); Pawel Owczarczyk (Highland, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L23/5223G06F30/394G06F30/398H01L21/823431H01L21/823475H01L27/0886H01L28/60G06F2111/04G06F2111/20G06F2119/18
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Quick Facts
Patent No.
US 11,322,439
App. No.
16/681,869
Granted
May 3, 2022
Kind
B2
Abstract

Aspects of the invention include forming a semiconductor device. Gates are formed in a first direction over fins, the gates including gate material, the fins being formed in a second direction. Fin interconnects are formed in the first direction over the fins. A dielectric material is formed on the fins, and capacitor interconnects are formed over portions of the dielectric material in the first direction over the fins.

Claims (18)

1. A method of forming a semiconductor device, the method comprising:

forming gates over fins, the gates comprising gate material;

forming fin interconnects over the fins;

forming a dielectric material on the fins; and

forming capacitors made from the fins and capacitor interconnects over portions of the dielectric material over the fins.

2. The method of claim 1 , wherein the dielectric material separates the capacitor interconnects and the fins.

3. A method of forming a semiconductor device, the method comprising:

forming gates in a first direction over fins, the gates comprising gate material, the fins being formed in a second direction;

forming fin interconnects in the first direction over the fins;

forming a dielectric material on the fins; and

forming capacitor interconnects over portions of the dielectric material in the first direction over the fins, wherein capacitors are formed by the capacitor interconnects, the dielectric material, and the fins.

4. The method of claim 1 , wherein parts of the fins are doped to be electrically conductive.

5. The method of claim 4 , wherein the parts of the fins being electrically conductive are utilized to form the capacitors with the capacitor interconnects and the dielectric material.

6. The method of claim 1 , wherein the capacitor interconnects are electrically conductive.

7. The method of claim 1 , wherein one or more first metal contacts are formed on the capacitor interconnects.

8. The method of claim 7 , wherein one or more second metal contacts are formed on the fin interconnects.

9. The method of claim 8 , wherein the one or more first metal contacts and the one or more second metal contacts provide electrical connection to the capacitors, the capacitors being formed of the capacitor interconnects, the dielectric material, and the fins.

10. The method of claim 1 , wherein the capacitor interconnects are interspaced between the gates such that a density of the gates is reduced.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2019
From: SPERLING, MICHAEL; ENGLISH, ERIK; SUTTON, AKIL KHAMISI; OWCZARCZYK, PAWEL
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 050989/0993 →
Continuity (1)
Related Publication 20210143095A1 · May 13, 2021