IP Library › Granted Patent US 11,836,490
Granted Patent B2
US 11,836,490 · App. 16/684,275 · Granted Dec 5, 2023

Kernel coefficient quantization

Inventors: Michael Stevens (Snohomish, WA); Amit Purwar (Pune, IN); Sean Pieper (San Jose, CA); Eric Dujardin (San Jose, CA)
Assignee: Nvidia Corporation
G06F9/30036G06F7/49915G06F9/5027G06F9/545G06F17/16
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Quick Facts
Patent No.
US 11,836,490
App. No.
16/684,275
Granted
Dec 5, 2023
Kind
B2
Abstract

Apparatuses, systems, and techniques to optimize memory usage when performing matrix operations. In at least one embodiment, a matrix is optimized to limit memory and storage requirements while minimizing loss of precision for a sum of the members of the matrix.

Claims (58)

1. A method for optimizing matrix conversions, comprising:

receiving a matrix of real numbers, wherein each real number is represented by a mantissa and an exponent;

identifying a mathematical operation to be performed on the matrix;

determining, based on the matrix and the mathematical operation, a computing resource requirement;

determining that the required computing resource requirement exceeds a threshold;

converting the matrix to a converted matrix, wherein the converted matrix minimizes error between a sum of the matrix and a sum of the converted matrix;

generating a result based on the mathematical operation and the converted matrix; and

providing the result.

2. The method of claim 1 , wherein the matrix is a filter kernel.

3. The method of claim 1 , wherein the matrix has at least one of horizontal, vertical, or diagonal symmetry, and wherein converting the matrix is at least partially based on the symmetry of the matrix.

4. The method of claim 1 , wherein converting the matrix to a converted matrix includes:

clipping one or more of the coefficients to reduce a number of storage bits for the one or more coefficients, and wherein the clipped storage bits are utilized to determine the error.

5. The method of claim 4 , wherein clipping the one or more coefficients includes reducing a number of storage bits for the mantissa of one or more of the coefficients.

6. The method of claim 1 , further comprising:

determining, based on the converted matrix and the mathematical operation, a second computing resource requirement; and

determining that the second required computing resource requirement does not exceed the threshold.

7. The method of claim 1 , wherein the converted matrix includes entries that are represented as fixed point numbers.

8. The method of claim 1 , wherein determining that the required computing resource requirement exceeds a threshold is based on at least one or the size of the matrix, maximum storage limit for the matrix, and a maximum computing time for performing the operation on the matrix.

9. The method of claim 1 , further comprising:

receiving a second matrix of real numbers;

determining that the mathematical operation is to be performed on the matrix and the second matrix; and

converting the second matrix to a second converted matrix, wherein the second converted matrix minimizes error between a sum of the second matrix and a sum of the second converted matrix,

wherein generating the result is further based on the second converted matrix.

10. A system comprising:

one or more processors including a mathematical processor;

mathematical processing memory operable to perform one or more mathematical operations; and

memory including instructions that, when executed by the one or more processors, cause the system to:

receive a matrix of real numbers, wherein each real number is represented by a mantissa and an exponent;

identify a mathematical operation to be performed on the matrix by the mathematical processor using the mathematical processing memory;

determine, based at least on the matrix and the mathematical operation, a computing resource requirement;

determine, based on at least one of the mathematical processing memory and the mathematical processor, that the required computing resource requirement exceeds a threshold;

convert the matrix to a converted matrix, wherein the converted matrix minimizes error between a sum of the matrix and a sum of the converted matrix;

provide the converted matrix to the mathematical processing memory to cause mathematical processor to generate a result based on the mathematical operation and the converted matrix; and

provide the result.

11. The system of claim 10 , wherein the memory further includes instructions to:

determine, based on the converted matrix and the mathematical operation, a second computing resource requirement; and

determine that the second required computing resource requirement does not exceed the threshold.

12. The system of claim 10 , wherein the memory further includes instructions to:

clip one or more of the coefficients to reduce a number of storage bits for the one or more coefficients, and wherein the clipped storage bits are utilized to determine the error.

13. The system of claim 12 , wherein clipping the one or more coefficients includes reducing a number of storage bits for the mantissa of one or more of the coefficients.

14. The system of claim 12 , wherein the converted matrix includes entries that are represented as fixed point numbers.

15. The system of claim 12 , wherein the memory further includes instructions to:

apply the result as a filter kernel to perform one or more image processing applications.

16. A non-transitory machine-readable medium having stored thereon a set of instructions, which if performed by one or more processors, cause the one or more processors to at least:

receive a square matrix of real numbers, wherein each real number is represented by a mantissa and an exponent;

identify a mathematical operation to be performed on the matrix;

determine, based on the matrix and the mathematical operation, a computing resource requirement;

determine that the required computing resource requirement exceeds a threshold;

convert the matrix to a converted matrix, wherein the converted matrix minimizes error between a sum of the matrix and a sum of the converted matrix;

generate a result based on the mathematical operation and the converted matrix; and

provide the result.

17. The non-transitory machine-readable medium of claim 16 , wherein the set of instructions further includes instructions to:

determine, based on the converted matrix and the mathematical operation, a second computing resource requirement; and

determine that the second required computing resource requirement does not exceed the threshold.

18. The non-transitory machine-readable medium of claim 16 , wherein the set of instructions further includes instructions to:

clip one or more of the coefficients to reduce a number of storage bits for the one or more coefficients, and wherein the clipped storage bits are utilized to determine the error.

19. The non-transitory machine-readable medium of claim 16 , wherein clipping the one or more coefficients includes reducing a number of storage bits for the mantissa of one or more of the coefficients.

20. The non-transitory machine-readable medium of claim 16 , wherein the converted matrix includes entries that are represented as fixed point numbers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2019
From: STEVENS, MICHAEL; PURWAR, AMIT; PIEPER, SEAN; DUJARDIN, ERIC
To: NVIDIA CORPORATION
Reel/Frame 051013/0388 →
Continuity (1)
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