Semiconductor package

1. A semiconductor package, comprising:

a frame including:

a core layer formed of a ferromagnetic material;

a through-hole passing through the core layer;

a semiconductor chip disposed in the through-hole of the frame, and having an active surface on which a connection pad is disposed and an inactive surface opposite to the active surface

a first wiring layer disposed on an upper surface of the core layer and a second wiring layer disposed on a lowermost surface of the core layer, a lower surface of the second wiring layer being lower than the lowermost surface of the core layer; and

a connection via passing through the core layer and disposed between the first wiring layer and the second wiring layer; and

a core insulating layer covering at least a portion of a surface of the core layer, the core insulating layer being provided directly between the lowermost surface of the core layer and an upper surface of the second wiring layer;

an encapsulant covering at least a portion of the semiconductor chip; and

a first connection structure disposed on the active surface of the semiconductor chip, and including a first redistribution layer electrically connected to the connection pad.

2. The semiconductor package of claim 1 , wherein the frame further includes:

the first wiring layer and the second wiring layer being electrically connected to the connection pad; and

the connection via having a side surface surrounded by the core insulating layer.

3. The semiconductor package of claim 1 , wherein the first wiring layer and the second wiring layer are respectively spaced apart from the core layer by the core insulating layer.

4. The semiconductor package of claim 1 , wherein the connection via has a cylindrical shape with a constant width.

5. The semiconductor package of claim 1 , further comprising:

a second connection structure including a via passing through the encapsulant and connected to the first wiring layer of the frame and a second redistribution layer disposed on the via.

6. The semiconductor package of claim 1 , wherein the ferromagnetic material includes a ferromagnetic metal material.

7. The semiconductor package of claim 1 , wherein the ferromagnetic material includes at least one selected from a group consisting of iron (Fe), nickel (Ni), cobalt (Co), and alloys thereof.

8. The semiconductor package of claim 1 , wherein the ferromagnetic material is uniformly distributed in the core layer.

9. A semiconductor package, comprising:

a frame including a core layer formed of a ferromagnetic material, and a through-hole passing through the core layer;

a semiconductor chip disposed in the through-hole of the frame, and having an active surface on which a connection pad is disposed and an inactive surface opposite to the active surface;

an encapsulant covering at least a portion of the semiconductor chip; and a first connection structure disposed on the active surface of the semiconductor chip, and including a first redistribution layer electrically connected to the connection pad,

wherein the frame further includes a first wiring layer and a second wiring layer disposed on both sides of the core layer, respectively, first and second build-up layers disposed on both sides of the core layer, respectively, and covering at least portions the first and second wiring layers, respectively, a third wiring layer disposed on the first build-up layer, and a fourth wiring layer disposed on the second build-up layer, and

the first to fourth wiring layers are electrically connected to the connection pad.

10. The semiconductor package of claim 9 , wherein the frame further includes a core insulating layer disposed between the core layer and each of the first and second build-up layers.

11. The semiconductor package of claim 10 , wherein the core insulating layer is interposed between the core layer and each of the first and second wiring layers.

12. A semiconductor package, comprising:

a frame having a through-hole and a core layer formed of a ferromagnetic material wherein the core layer surrounds the through-hole;

a semiconductor chip disposed in the through-hole of the frame, and having an active surface on which a connection pad is disposed and an inactive surface opposite to the active surface;

an encapsulant covering at least a portion of the semiconductor chip; and

a connection structure disposed on the active surface of the semiconductor chip, and including a redistribution layer electrically connected to the connection pad,

wherein the frame has magnetic properties due to the core layer,

wherein the frame further includes a core insulating layer covering at least a portion of a surface of the core layer,

wherein the core insulating layer includes prepreg or an Ajinomoto Build-up Film (ABF).

13. The semiconductor package of claim 12 , wherein the frame further includes a connection via passing through the core layer and spaced apart from the core layer by the core insulating layer.

14. The semiconductor package of claim 1 , wherein the core insulating layer covers a side surface of the core layer except for an outmost side surface forming a side surface of the semiconductor package, the upper surface of the core layer, and the lowermost surface of the core layer.

15. The semiconductor package of claim 1 , wherein the core insulating layer is disposed between the upper surface of the core layer and a lower surface of the first wiring layer.

16. The semiconductor package of claim 9 , wherein the core layer has a thickness greater than thicknesses of the first and the second build-up layers.