PACKET HEADER FIELD EXTRACTION
Some embodiments provide a method for processing a packet for a pipeline of a hardware switch. The pipeline, in some embodiments, includes several different stages that match against packet header fields and modify packet header fields. The method receives a packet that includes a set of packet headers. The method then populates, for each packet header in the set of packet headers, (i) a first set of registers with packet header field values of the packet header that are used in the pipeline, and (ii) a second set of registers with packet header field values of the packet header that are not used in the pipeline.
1 - 20 (canceled)
21 . Network switch circuitry for use with at least one network, the network switch circuitry, when in operation, being to receive at least one ingress packet via the at least one network and also being to generate at least one egress packet for being output from the network switch circuitry, the network switch circuitry comprising:
packet processing circuitry for processing the at least one ingress packet to generate the at least one egress packet, the packet processing circuitry being for being programmed for use in (1) identifying header field values of the at least one ingress packet that correspond to particular flow information of the at least one ingress packet, and (2) determining at least one particular action that the network switch circuitry is to take with respect to the processing of the at least one ingress packet, the packet processing circuitry being programmable, at least in part, based upon compilation of user-provided program instruction code, the user-provided program language code describing, at least in part, (1) manner that the packet processing circuitry is to parse the at least one ingress packet, and (2) match-action table entries that correlate possible packet flows with corresponding actions to be taken by the network switch circuitry, the compilation being for use in generating, at least in part, configuration data for use in programming, at least in part, the packet processing circuitry;
wherein:
the determining of the at least one particular action is to be based, at least in part, upon the particular flow information and the match-action table entries; and
the packet processing circuitry is also programmable for use in packet processing operations related to:
packet switching;
packet tunneling;
packet modification; and
packet dropping.
22 . The network switch circuitry of claim 21 , wherein:
the packet processing circuitry is programmable for use in wildcard matching operations related to the match-action table entries.
23 . The network switch circuitry of claim 22 , wherein:
the network switch circuitry is for use in association with a network adapter of a server computer; and
the network switch circuitry is to receive the at least one ingress packet via the network adapter.
24 . The network switch circuitry of claim 23 , wherein:
the packet processing operations are related to:
GRE processing; and/or
GENEVE processing.
25 . The network switch circuitry of claim 24 , wherein:
the header field values comprise at least one source address value, at least one destination address value, at least one source port value, at least one destination port value, and at least one protocol type value.
26 . The network switch circuitry of claim 25 , wherein:
the configuration data defines, at least in part, match-action data of the match-action table entries.
27 . At least one non-transitory machine-readable medium storing instructions for being executed by network switch circuitry, the network switch circuitry being for use with at least one network, being to receive at least one ingress packet via the at least one network, and also being to generate at least one egress packet for being output from the network switch circuitry, the instructions, when executed by the network switch circuitry resulting in the network switch circuitry being configured to perform operations comprising:
processing, by packet processing circuitry of the network switch circuitry, the at least one ingress packet to generate the at least one egress packet, the processing comprising (1) identifying header field values of the at least one ingress packet that correspond to particular flow information of the at least one ingress packet, and (2) determining at least one particular action that the network switch circuitry is to take with respect to the processing of the at least one ingress packet, the packet processing circuitry being programmable, at least in part, based upon compilation of user-provided program instruction code, the user-provided program language code describing, at least in part, (1) manner that the packet processing circuitry is to parse the at least one ingress packet, and (2) match-action table entries that correlate possible packet flows with corresponding actions to be taken by the network switch circuitry, the compilation being for use in generating, at least in part, configuration data for use in programming, at least in part, the packet processing circuitry;
wherein:
the determining of the at least one particular action is to be based, at least in part, upon the particular flow information and the match-action table entries; and
the packet processing circuitry is also programmable for use in packet processing operations related to:
packet switching;
packet tunneling;
packet modification; and
packet dropping.
28 . The at least one non-transitory machine-readable medium of claim 27 , wherein:
the packet processing circuitry is programmable for use in wildcard matching operations related to the match-action table entries.
29 . The at least one non-transitory machine-readable medium of claim 28 , wherein:
the network switch circuitry is for use in association with a network adapter of a server computer; and
the network switch circuitry is to receive the at least one ingress packet via the network adapter.
30 . The at least one non-transitory machine-readable medium of claim 29 , wherein:
the packet processing operations are related to:
GRE processing; and/or
GENEVE processing.
31 . The at least one non-transitory machine-readable medium of claim 30 , wherein:
the header field values comprise at least one source address value, at least one destination address value, at least one source port value, at least one destination port value, and at least one protocol type value.
32 . The at least one non-transitory machine-readable medium of claim 31 , wherein:
the configuration data defines, at least in part, match-action data of the match-action table entries.
33 . At least one non-transitory machine-readable storage medium storing instructions for being executed by at least one computing device, the instructions, when executed by the at least one computing device resulting in the at least one computing device being configured for performance of operations comprising:
generating, at least in part, a compilation of user-provided program language code, the compilation being usable in programming of packet processing circuitry of network switch circuitry, the user-provided program language code describing, at least in part, (1) manner that the packet processing circuitry is to parse at least one ingress packet that is to be received by the network switch circuitry via at least one network, and (2) match-action table entries that correlate possible packet flows with corresponding actions to be taken by the network switch circuitry, the compilation being for use in generating, at least in part, configuration data for use in the programming, at least in part, the packet processing circuitry, the packet processing circuitry being for use in processing the at least one ingress packet to generate at least one egress packet that is to be output from the network switch circuitry, the processing comprising (1) identifying header field values of the at least one ingress packet that correspond to particular flow information of the at least one ingress packet, and (2) determining at least one particular action that the network switch circuitry is to take with respect to the processing of the at least one ingress packet;
wherein:
the determining of the at least one particular action is to be based, at least in part, upon the particular flow information and the match-action table entries; and
the packet processing circuitry is also programmable for use in packet processing operations related to:
packet switching;
packet tunneling;
packet modification; and
packet dropping.
34 . The at least one non-transitory machine-readable medium of claim 33 , wherein:
the packet processing circuitry is programmable for use in wildcard matching operations related to the match-action table entries.
35 . The at least one non-transitory machine-readable medium of claim 34 , wherein:
the network switch circuitry is for use in association with a network adapter of a server computer; and
the network switch circuitry is to receive the at least one ingress packet via the network adapter.
36 . The at least one non-transitory machine-readable medium of claim 35 , wherein:
the packet processing operations are related to:
GRE processing; and/or
GENEVE processing.
37 . The at least one non-transitory machine-readable medium of claim 36 , wherein:
the header field values comprise at least one source address value, at least one destination address value, at least one source port value, at least one destination port value, and at least one protocol type value.
38 . The at least one non-transitory machine-readable medium of claim 37 , wherein:
the configuration data defines, at least in part, match-action data of the match-action table entries.