IP Library › Granted Patent US 10,790,997
Granted Patent B2
US 10,790,997 · App. 16/704,502 · Granted Sep 29, 2020

Transmission of pulse power and data in a communications network

Inventors: Chad M. Jones (Doylestown, OH); Joel Richard Goergen (Soulsbyville, CA); George Allan Zimmerman (Manhattan Beach, CA); Richard Anthony O'Brien (Livermore, CA); Douglas Paul Arduini (San Ramon, CA); Jason DeWayne Potterf (Austin, TX); Sung Kee Baek (San Ramon, CA)
Assignee: CISCO TECHNOLOGY, INC.
H04L12/10H03M13/03H04B3/54H04L41/12H04W80/02H04B2203/542
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Quick Facts
Patent No.
US 10,790,997
App. No.
16/704,502
Granted
Sep 29, 2020
Kind
B2
Abstract

In one embodiment, a method includes transmitting data on two wire pairs carrying pulse power, wherein the pulse power comprises a plurality of voltage pulses with the voltage pulses on the wire pairs offset between the wire pairs to provide continuous power and identifying transitions between at least one of a pulse-on time and a pulse-off time, and a pulse-off time and a pulse-on time on at least one of the wire pairs. Data transmission on the wire pair is controlled during the identified transitions on the wire pair to prevent interference between the pulse power and the data.

Claims (40)

1. A method comprising:

transmitting data on two wire pairs carrying DC pulse power, wherein the DC pulse power comprises a plurality of voltage pulses with the voltage pulses on the wire pairs offset between the wire pairs to provide continuous power; and

identifying transitions between at least one of a pulse-on time and a pulse-off time, and a pulse-off time and a pulse-on time on at least one of the wire pairs;

wherein data transmission on said at least one wire pair is controlled during said identified transitions on the wire pair to prevent interference between the DC pulse power and the data.

2. The method of claim 1 wherein a phase of the DC pulse power is carried on each of the wire pairs and the wire pairs are located in a multi-pair cable.

3. The method of claim 1 wherein a voltage of the DC pulse power during the pulse-on time comprises at least 60 volts.

4. The method of claim 1 wherein a voltage of the DC pulse power during the pulse-off time is greater than zero.

5. The method of claim 1 wherein the pulse-on time of the voltage pulses overlap between the wire pairs.

6. The method of claim 1 wherein one period of the pulse-on time and the pulse-off time is less than or equal to 12 ms.

7. The method of claim 1 further comprising performing fault detection during the pulse-off time.

8. The method of claim 1 wherein the data is transmitted during the pulse-on time and the pulse-off time.

9. The method of claim 1 wherein control of the data transmission comprises suspending the data transmission during said identified transitions.

10. The method of claim 1 wherein control of the data transmission comprises controlling a MAC (Media Access Control)/PHY (Physical layer entity) to hold off the data transmission during said identified transitions.

11. The method of claim 1 wherein control of the data transmission comprises applying Forward Error Correction (FEC) to the data for use at the receiver during said identified transitions.

12. A method comprising:

receiving data on two wire pairs carrying DC pulse power, wherein the DC pulse power comprises a plurality of voltage pulses with the voltage pulses on the wire pairs offset between the wire pairs to provide continuous power;

identifying transitions between at least one of a pulse-on time and a pulse-off time, and a pulse-off time and a pulse-on time on at least one of the wire pairs; and

controlling the data on said at least one wire pair during said identified transitions on the wire pair to prevent interference between the DC pulse power and the data.

13. The method of claim 12 wherein a phase of the DC pulse power is carried on each of the wire pairs and the wire pairs are located in a multi-pair cable.

14. The method of claim 12 wherein a voltage of the DC pulse power during the pulse-off time is greater than zero.

15. The method of claim 12 wherein each of said identified transitions comprises an approximately 0.5 ms time window and one period of the pulse-on time and the pulse-off time is less than or equal to 12 ms.

16. The method of claim 12 wherein fault detection is performed during the pulse-off time.

17. The method of claim 12 wherein the data is received only during the pulse-on time.

18. The method of claim 12 further comprising transmitting data on the two wire pairs.

19. The method of claim 12 wherein said controlling the data comprises marking the data received during said identified transitions.

20. The method of claim 19 wherein at least a portion of said marked data is dropped or retransmitted.

21. The method of claim 12 wherein Forward Error Correction (FEC) is applied to the data at a transmitter and wherein said controlling the data comprises marking the data for decoding during said identified transitions.

22. The method of claim 12 further comprising decoding encoded modulation of the DC pulse power for control plane data.

23. An apparatus comprising:

an interface for transmitting data on at least two wire pairs carrying DC pulse power, wherein the DC pulse power comprises a plurality of voltage pulses; and

a controller for identifying transitions between at least one of a pulse-on time and a pulse-off time, and a pulse-off time and a pulse-on time on at least one of the wire pairs and suspending data transmission on said at least one wire pair during said identified transitions on the wire pair to prevent interference between the DC pulse power and the data.

24. The apparatus of claim 23 wherein the controller is operable to perform fault detection of the wire pairs during the pulse-off time on each of the wire pairs.

25. The apparatus of claim 23 wherein the controller is further operable to utilize a power line communications zero-crossing timestamp and a pulse synchronization signal to discover a network topology.

26. The apparatus of claim 23 wherein the voltage pulses on the wire pairs are offset between the wire pairs to provide continuous power.

27. An apparatus comprising:

an interface for receiving data on at least two wire pairs carrying DC pulse power, wherein the DC pulse power comprises a plurality of voltage pulses; and

a controller for identifying transitions between at least one of a pulse-on time and a pulse-off time, and a pulse-off time and a pulse-on time on at least one of the wire pairs and controlling the data on said at least one wire pair during said identified transitions on the wire pair to prevent interference between the DC pulse power and the data.

28. The apparatus of claim 27 wherein the data is received during the pulse-on time and the pulse-off time.

29. The apparatus of claim 27 wherein the voltage pulses on the wire pairs are offset between the wire pairs to provide continuous power and the controller is operable to synchronize said plurality of voltage pulses with a transmitter using information in the data.

30. The apparatus of claim 27 wherein said controlling the data comprises marking the data received during said identified transitions.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2019
From: JONES, CHAD M.; GOERGEN, JOEL RICHARD; ZIMMERMAN, GEORGE ALLAN; O'BRIEN, RICHARD ANTHONY; ARDUINI, DOUGLAS PAUL; POTTERF, JASON DEWAYNE; BAEK, SUNG KEE
To: CISCO TECHNOLOGY, INC.
Reel/Frame 051192/0236 →
Continuity (2)
Continuation In Part 16255657 · Jan 23, 2019
Related Publication 20200235949A1 · Jul 23, 2020
Cited By (13)
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