Vertical semiconductor device and method for fabricating the same
A vertical semiconductor device and a method for fabricating the same may include forming an alternating stack of dielectric layers and sacrificial layers over a lower structure, forming an opening by etching the alternating stack, forming a non-conformal blocking layer on the alternating stack in which the opening is formed, adsorbing a deposition inhibitor on a surface of the blocking layer to convert the non-conformal blocking layer into a conformal blocking layer on which the deposition inhibitor is adsorbed, and forming a charge storage layer on the conformal blocking layer.
1. A method for fabricating a vertical semiconductor device comprising:
forming an alternating stack of dielectric layers and sacrificial layers over a lower structure;
forming an opening by etching the alternating stack;
forming a blocking layer on the alternating stack in which the opening is formed;
performing a surface treatment to adsorb a deposition inhibitor on a surface of the blocking layer; and
forming a charge storage layer on the blocking layer on which the deposition inhibitor is adsorbed.
2. The method of claim 1 , wherein the surface treatment comprises a plasma treatment.
3. The method of claim 1 , wherein the surface treatment is concentrated on a top corner of the opening.
4. The method of claim 1 , wherein the surface treatment comprises partially etching the blocking layer at a top corner of the opening.
5. The method of claim 1 , wherein the surface treatment is performed by plasma treatment comprising a plasma including an etch species.
6. The method of claim 1 , wherein the deposition inhibitor comprises a plasma including fluorine.
7. The method of claim 1 , wherein the deposition inhibitor comprises a plasma including nitrogen trifluoride NF 3 .
8. The method of claim 1 , wherein the deposition inhibitor comprises fluorine F, chlorine Cl, nitrogen N 2 or hydrogen fluoride HF.
9. A method for fabricating a vertical semiconductor device comprising:
forming an alternating stack of dielectric layers and sacrificial layers over a lower structure;
forming an opening by etching the alternating stack;
forming a blocking layer on the alternating stack in which the opening is formed;
performing a first surface treatment to adsorb a first deposition inhibitor on a surface of the blocking layer;
forming a charge storage layer on the blocking layer on which the first deposition inhibitor is adsorbed; and
performing a second surface treatment to adsorb a second deposition inhibitor on a surface of the charge storage layer.
10. The method of claim 9 , wherein the first surface treatment comprises performing a plasma treatment.
11. The method of claim 9 , wherein the first surface treatment is concentrated on a top corner of the opening.
12. The method of claim 9 , wherein the first surface treatment comprises partially etching the blocking layer at a top corner of the opening.
13. The method of claim 9 , wherein the first surface treatment comprises using a plasma including an etch species.
14. The method of claim 9 , wherein the first deposition inhibitor comprises a plasma including fluorine.
15. The method of claim 9 , wherein the first deposition inhibitor comprises a plasma including nitrogen trifluoride NF 3 .
16. The method of claim 9 , wherein the first deposition inhibitor comprises fluorine F, chlorine Cl, nitrogen N 2 or hydrogen fluoride HF.
17. The method of claim 9 , wherein the blocking layer comprises silicon oxide or aluminum oxide.
18. The method of claim 9 , wherein the first deposition inhibitor and the second deposition inhibitor comprise the same material of a plasma.
19. The method of claim 9 , wherein the first deposition inhibitor and the second deposition inhibitor comprise fluorine F, chlorine Cl, nitrogen N 2 or hydrogen fluoride HF.
20. The method of claim 9 , further comprises:
forming a tunnel dielectric layer on the charge storage layer on which the second deposition inhibitor is adsorbed; and
forming a channel layer on the tunnel dielectric layer.