IP Library › Granted Patent US 11,132,292
Granted Patent B2
US 11,132,292 · App. 16/709,380 · Granted Sep 28, 2021

Active input/output expander of a memory sub-system

Inventors: Suresh Rajgopal (San Diego, CA); Jeremy W. Butterfield (Meridian, ID); Sean E. Nerich (Boise, ID); Dustin J. Carter (Placerville, CA)
Assignee: Micron Technology, Inc.
G06F12/0246G06F9/544G06F12/0835G06F12/0868G06F12/0882
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Quick Facts
Patent No.
US 11,132,292
App. No.
16/709,380
Granted
Sep 28, 2021
Kind
B2
Abstract

A read command to read a target memory die of a memory sub-system is received from a host system via a host-side interface of an active input/output (I/O) expander. The active I/O expander identifies a page address corresponding to the target memory die and decodes the read command to send to a memory stack associated with the page address corresponding to the target memory die. Read data is received via a memory-side interface of the active I/O expander from the memory stack including the target memory die. A signal conditioning operation is performed on the read data to generate conditioned read data. The active I/O expander sends, via the host-side interface, the conditioned read data to the host system.

Claims (41)

1. A method comprising:

receiving, by a processing device from a host system via a host-side interface of an active input/output (I/O) expander, a read command to read a target memory die of a memory sub-system;

configuring a value setting associated with one or more parameters of at least one of the host-side interface or a memory-side interface of the active I/O expander to enable Open NAND Flash Interface (ONFI)-compliant communications between the host system and the target memory die;

identifying a page address corresponding to the target memory die;

decoding the read command to send to a memory stack associated with the page address corresponding to the target memory die;

receiving, via the memory-side interface of the active I/O expander, read data relating to the read command from the memory stack comprising the target memory die;

performing a signal conditioning operation on the read data to generate conditioned read data; and

sending via the host-side interface of the active I/O expander, an ONFI-compliant communication comprising the conditioned read data to the host system.

2. The method of claim 1 , further comprising selecting the active I/O expander from a plurality of active I/O expanders in response to the read command.

3. The method of claim 1 , wherein a set of signals transmitted via at least one of the host-side interface or the memory-side interface are conditioned in accordance with one or more ONFI specifications.

4. The method of claim 1 , wherein the one or more parameters comprise at least one of a drive strength parameter or an on-die termination parameter.

5. The method of claim 1 , further comprising initiating a calibration command to tune the value setting of at least one of the host-side interface or the memory-side interface.

6. The method of claim 5 , wherein the value setting are tuned to match a parasitic load on the active I/O expander.

7. The method of claim 1 , wherein the signal condition operation comprises at least one of a buffering operation or a retiming operation.

8. A system comprising:

a memory component;

a processing device operatively coupled to the memory component, the processing device to:

receive, from a host system via a host-side interface of an active I/O expander, a write command identifying a target memory die;

configure a value setting associated with one or more parameters of at least one of the host-side interface or a memory-side interface of the active I/O expander to enable Open NAND Flash Interface (ONFI)-compliant communications between the host system and the target memory die;

decode the write command to send to the target memory die;

receive, from the host system via the host-side interface of the active I/O expander, data to be written to the target memory die;

perform a signal conditioning operation on the data to be written to generate conditioned write data; and

send, via the memory-side interface of the active I/O expander, an ONFI-compliant communication comprising the conditioned write data to the target memory die.

9. The system of claim 8 , wherein the processing device is further to select the active I/O expander from a plurality of active I/O expander in response to the write command.

10. The system of claim 8 , wherein the one or more parameters comprise at least one of a drive strength parameter or an on-die termination parameter.

11. The system of claim 10 , wherein the processing device is further to initiate a calibration command to tune the value setting of at least one of the host-side interface or the memory-side interface.

12. The system of claim 11 , wherein the processing device is further to match the value setting to a parasitic load on the active I/O expander.

13. The system of claim 10 , wherein the signal condition operation comprises at least one of a buffering operation or a retiming operation.

14. A non-transitory computer-readable medium storing instructions that, when executed, cause a processing device to:

receive from a host system via a host-side interface of an active input/output (I/O) expander, a read command to read a target memory die of a memory sub-system;

configure a value setting associated with one or more parameters of at least one of the host-side interface or a memory-side interface of the active I/O expander to enable Open NAND Flash Interface (ONFI)-compliant communications between the host system and the target memory die;

decode the read command to send to a memory stack associated with the target memory die;

receive, via the memory-side interface of the active I/O expander, read data from the memory stack comprising the target memory die;

perform a signal conditioning operation on the read data to generate conditioned read data; and

send via the host-side interface of the active I/O expander, an ONFI-compliant communication comprising the conditioned read data to the host system.

15. The non-transitory computer-readable medium of claim 14 , wherein the processing device is further to select the active I/O expander from a plurality of active I/O expanders in response to the read command.

16. The non-transitory computer-readable medium of claim 14 , wherein a set of signals transmitted via at least one of the host-side interface or the memory-side interface are conditioned in accordance with one or more ONFI specifications.

17. The non-transitory computer-readable medium of claim 14 , wherein the one or more parameters comprise at least one of a drive strength parameter or an on-die termination parameter.

18. The non-transitory computer-readable medium of claim 17 , wherein the processing device is further to initiate a calibration command to tune the value setting of at least one of the host-side interface or the memory-side interface.

19. The non-transitory computer-readable medium of claim 18 , wherein the value setting is tuned to match a parasitic load on the active I/O expander.

20. The non-transitory computer-readable medium of claim 14 , wherein the signal condition operation comprises at least one of a buffering operation or a retiming operation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2020
From: RAJGOPAL, SURESH; BUTTERFIELD, JEREMY W.; NERICH, SEAN E.; CARTER, DUSTIN J.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 054532/0004 →
Continuity (1)
Related Publication 20210173771A1 · Jun 10, 2021
Cited By (1)
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