IP Library › Granted Patent US 11,405,324
Granted Patent B1
US 11,405,324 · App. 16/712,482 · Granted Aug 2, 2022

Packet serial number validation

Inventors: Avigdor Segal (Netanya, IL); Leah Shalev (Zikhron Ya'Aqov, IL); Nofar Mann (Modi'in, IL); Erez Izenberg (Tel Aviv-Jaffa, IL); Noam Katz (Tel Aviv-Jaffa, IL)
Assignee: Amazon Technologies, Inc.
H04L47/34H04L1/1614H04L1/1832H04L47/2483
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Quick Facts
Patent No.
US 11,405,324
App. No.
16/712,482
Filed
Dec 12, 2019
Granted
Aug 2, 2022
Kind
B1
Art Unit
2477
USPC
370/216
Abstract

A technique for packet processing may include maintaining a data structure representing transport status information associated with a sliding window of sequential packets for a host system. When a packet targeted for the host system is received, a packet validation process can be performed on the packet. The packet validation process may include validating that the packet belongs to the sliding window of the sequential packets by comparing the packet serial number of the packet against the packets being expected in the sliding window. The packet validation process may also include validating that the packet is being received for the first time and is not a duplicate packet. Upon validating the packet, the packet can be placed into the host system, and the status information can be updated to indicate that the packet has been received.

Claims (61)

1. A method performed by a network adapter device for hardware validation of packets prior to storing the packets in a host computing device, the method comprising:

receiving, by packet validation circuitry of the network adapter device, a packet associated with a packet serial number (PSN);

determining, by the packet validation circuitry, a flowlet identifier associated with the packet;

determining, by the packet validation circuitry, that the packet is targeted for direct data placement into the host computing device, the direct data placement bypassing a management module of the network adapter device;

retrieving, by the packet validation circuitry, flowlet status information for a predetermined number of sequential packets being expected for the flowlet identifier, wherein the flowlet status information includes a PSN base and a transport status for each of the sequential packets to indicate whether that packet has already been received, and wherein the PSN base corresponds to a first packet being expected in the sequential packets;

validating, by the packet validation circuitry, the packet by:

determining that the PSN of the packet corresponds to one of the sequential packets being expected; and

determining that the transport status associated with the PSN of the packet indicates the packet is being received for a first time;

in response to validating the packet:

updating the flowlet status information by modifying the transport status of the packet to indicate that the packet has been received; and

performing direct data placement of the packet into the host computing device, the packet being placed into the host computing device using direct data placement being an out-of-order packet;

determining, by the packet validation circuitry, that a number of packets having consecutive PSNs starting with the PSN base have been received; and

incrementing, by packet validation circuitry, the PSN base by the number of packets.

2. The method of claim 1 , wherein updating the flowlet status information further includes increasing the PSN base by a number of consecutive packets starting with the first packet of the sequential packets that have been received and validated.

3. The method of claim 1 , further comprising:

receiving a second packet;

determining that a PSN of the second packet does not correspond to any of the sequential packets being expected; and

discarding the second packet to prevent the second packet from being written into the host computing device.

4. The method of claim 1 , further comprising:

receiving a second packet;

determining that the second packet is a duplicate packet as indicated by a transport status associated with the PSN of the second packet; and

discarding the second packet to prevent the second packet from being written into the host computing device.

5. A method comprising:

storing, by a receiving device, a data structure representing status information associated with a sliding window of a predetermined number of sequential packets;

receiving, by the receiving device, a packet targeted for a host computing device;

determining, by the receiving device, that the packet is targeted for direct data placement into the host computing device, the direct data placement bypassing a management module of the receiving device;

performing, by the receiving device, a packet validation process on the packet in response to determining that the packet is targeted for direct data placement, wherein the packet validation process includes:

validating, based on a packet serial number (PSN) of the packet, that the packet belongs to the sliding window of the sequential packets; and

validating, based on the PSN of the packet, that the packet is a new packet being received by the receiving device;

updating, by the receiving device, the status information to indicate that the packet associated with the PSN has been received;

placing, by the receiving device, the packet in the host computing device using direct data placement, the packet being placed into the host computing device using direct data placement being an out-of-order packet;

determining, by the receiving device, that a number of consecutive packets starting at a beginning of the sliding window that have been received; and

advancing, by the receiving device, the sliding window by the number of consecutive packets that have been received.

6. The method of claim 5 , further comprising:

advancing, by the receiving device, the sliding window by a number of consecutive packets starting at a beginning of the sliding window that have been received.

7. The method of claim 6 , wherein the data structure stores a PSN base corresponding to a PSN of a first packet being expected at the beginning of the sliding window.

8. The method of claim 7 , wherein advancing the sliding window includes updating the PSN base to a PSN of a next packet of the sequential packets that has not yet been received.

9. The method of claim 5 , wherein the data structure stores a data bit representing a transport status of each of the sequential packets of the sliding window.

10. The method of claim 5 , further comprising:

verifying a checksum of the packet or performing a static header validation process prior to performing the packet validation process.

11. The method of claim 5 , wherein the PSN of the packet is extracted from a header of the packet.

12. The method of claim 5 , wherein the sequential packets of the sliding window are associated a flowlet being used to transmit packets from a sender device to the receiving device.

13. The method for claim 12 , further comprising:

receiving a second packet associated with the flowlet and having a PSN that corresponds to a packet that is outside the sliding window, or corresponds to a packet that has already been received for the flowlet; and

discarding the second packet to prevent the second packet from being placed in the host computing device.

14. An integrated circuit device comprising:

storage circuitry configured to store status information of a flowlet, the status information representing a sliding window of a predetermined number of sequential packets associated with the flowlet;

validation circuitry configured to perform a packet serial number (PSN) validation process to validate a packet targeted for direct data placement being received by the integrated circuit device, the validation circuitry allowing the direct data placement to be performed on out-of-order packets, wherein the direct data placement bypasses a management module of the integrated circuit device, and wherein the PSN validation process includes:

validating that a PSN of the packet being received by the integrated circuit device corresponds to one of the sequential packets of the sliding window; and

validating that a transport status associated with the PSN indicates that the packet is being received for a first time; and

status information update circuitry configured to:

update the transport status associated with the PSN to indicate that the packet has been received;

determine that a number of consecutive packets starting at a beginning of the sliding window have been validated; and

advance the sliding window by the number of consecutive packets starting from the beginning of the sliding window that have been validated by the integrated circuit device.

15. The integrated circuit device of claim 14 , further comprising a data placement circuitry configured to place the packet into a host computing device after the PSN validation process.

16. The integrated circuit device of claim 14 , wherein the integrated circuit device is configured to perform the PSN validation process after validating other header fields of the packet.

17. The integrated circuit device of claim 16 , wherein the status information includes a PSN base representing a first packet at the beginning of the sliding window.

18. The integrated circuit device of claim 16 , wherein the status information includes a transport status bit for each of the sequential packets in the sliding window, the transport status bit indicating whether the corresponding packet of the sliding window has previously been received by the integrated circuit device.

19. The integrated circuit device of claim 16 , wherein the storage circuitry is configured to store status information for each of a plurality of flowlets being used to transmit packets to a host computing device.

20. The integrated circuit device of claim 16 , wherein the PSN validation process is performed without firmware or software analysis of the packet.

21. The integrated circuit device of claim 14 , wherein the direct data placement is configured to place the packet in a memory of a host computing device without copying the packet to an operating system buffer of the host computing device.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2022
From: SEGAL, AVIGDOR; SHALEV, LEAH; MANN, NOFAR; IZENBERG, EREZ; KATZ, NOAM
To: AMAZON TECHNOLOGIES, INC.
Reel/Frame 059750/0227 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 8, 2020
From: SEGAL, AVIGDOR; SHALEV, LEAH; MAN, NOFAR; IZENBERG, EREZ; KATZ, NOAM
To: AMAZON TECHNOLOGIES, INC.
Reel/Frame 051452/0016 →
Cited By (2)
US 12,647,486 US 12,701,090