Phase-change memory and method of forming same

1. A device comprising:

a substrate;

a first dielectric layer over the substrate;

a bottom electrode extending through the first dielectric layer;

a first buffer layer over the bottom electrode, wherein a topmost surface of the first buffer layer is substantially level with a topmost surface of the first dielectric layer;

a phase-change layer over the first buffer layer;

a top electrode over the phase-change layer, wherein a width of the top electrode is greater than a width of the bottom electrode; and

a second dielectric layer over the first dielectric layer, the second dielectric layer surrounding the phase-change layer and the top electrode.

2. The device of claim 1 , wherein the first buffer layer and the bottom electrode have a same width.

3. The device of claim 1 , further comprising a second buffer layer between the phase-change layer and the top electrode, wherein the second dielectric layer surrounds the second buffer layer.

4. The device of claim 1 , wherein the first buffer layer comprises amorphous carbon, W, WN, TaN, Ru, graphene, MoS 2 , or WS 2 .

5. The device of claim 1 , wherein the first buffer layer is in physical contact with a sidewall of the first dielectric layer.

6. The device of claim 1 , wherein the phase-change layer is in physical contact with the topmost surface of the first dielectric layer.

7. The device of claim 1 , wherein a bottommost surface of the first buffer layer is above a top surface of the bottom electrode and below the topmost surface of the first dielectric layer.

8. A device comprising:

a substrate;

a first dielectric layer over the substrate;

a conductive line in the first dielectric layer;

a second dielectric layer over the conductive line and the first dielectric layer;

a bottom electrode within the second dielectric layer, the bottom electrode being electrically connected to the conductive line, the bottom electrode having a first width;

a first buffer layer over the bottom electrode, a bottommost surface of the first buffer layer being above a top surface of the bottom electrode and below a top surface of the second dielectric layer, the first buffer layer having a second width;

a phase-change layer over the first buffer layer, the phase-change layer having a third width greater than the first width;

a top electrode over the phase-change layer, the top electrode having the third width;

a third dielectric layer over the second dielectric layer, the third dielectric layer extending along sidewalls of the phase-change layer and sidewalls of the top electrode;

a fourth dielectric layer over the third dielectric layer and the top electrode; and

a conductive via within the fourth dielectric layer, the conductive via being electrically connected to the top electrode.

9. The device of claim 8 , wherein the bottom electrode and the top electrode comprise different conductive materials.

10. The device of claim 8 , wherein the bottom electrode and the top electrode comprise a same conductive material.

11. The device of claim 8 , further comprising a second buffer layer between the phase-change layer and the top electrode, the second buffer layer having the third width.

12. The device of claim 8 , wherein the first width is equal to the second width.

13. The device of claim 8 , wherein the first buffer layer comprises amorphous carbon, W, WN, TaN, Ru, graphene, MoS 2 , or WS 2 .

14. The device of claim 8 , wherein the phase-change layer is in physical contact with the top surface of the second dielectric layer.

15. A device comprising:

a substrate;

a first interconnect structure over the substrate;

a first dielectric layer over the first interconnect structure;

a bottom electrode embedded in the first dielectric layer;

a first buffer layer over the bottom electrode;

a phase-change layer over the first buffer layer, the phase-change layer being in physical contact with a top surface of the first dielectric layer, wherein a width of the phase-change layer is greater than a width of the bottom electrode;

a top electrode over the phase-change layer; and

a second dielectric layer over the first dielectric layer, wherein the second dielectric layer is in physical contact with sidewalls of the phase-change layer and sidewalls of the top electrode.

16. The device of claim 15 , wherein the first dielectric layer extends along sidewalls of the first buffer layer.

17. The device of claim 15 , wherein a width of the first buffer layer is same as the width of the bottom electrode.

18. The device of claim 15 , further comprising a second buffer layer between the phase-change layer and the top electrode, wherein a width of the second buffer layer is same as the width of the phase-change layer.

19. The device of claim 15 , further comprising a second interconnect structure over the second dielectric layer and the top electrode.

20. The device of claim 15 , wherein the phase-change layer is in physical contact with a top surface of the first buffer layer.