IP Library › Granted Patent US 11,094,032
Granted Patent B2
US 11,094,032 · App. 16/734,252 · Granted Aug 17, 2021

Out of order wave slot release for a terminated wave

Inventors: Yun Du (San Diego, CA); Chun Yu (Rancho Santa Fe, CA); Andrew Evan Gruber (Arlington, MA); Zilin Ying (San Diego, CA); Baoguang Yang (Fremont, CA)
Assignee: QUALCOMM Incorporated
G06T1/20G06T11/001
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Quick Facts
Patent No.
US 11,094,032
App. No.
16/734,252
Granted
Aug 17, 2021
Kind
B2
Abstract

Methods, systems, and devices for image processing are described. A device may determine, based on a test operation, to terminate a first wave associated with a first slot of a set of slots. The device may update a terminated wave bit associated with the first slot based on the determination to terminate the first wave. In some aspects, the device may update a number of invocations field associated with the first wave based on the determination to terminate the first wave. The device may release the first slot based on updating the terminated wave bit and the number of invocations field. In some examples, the device may output the number of invocations field to a rendering backend of the device based on the terminated wave bit.

Claims (70)

1. A method for image processing at a device, comprising:

determining, based at least in part on a test operation, to terminate a first wave associated with a first slot of a set of slots;

updating a terminated wave bit associated with the first slot based at least in part on the determination to terminate the first wave;

updating a number of invocations field associated with the first wave based at least in part on the determination to terminate the first wave;

releasing the first slot based at least in part on updating the terminated wave bit and the number of invocations field; and

outputting the number of invocations field to a rendering backend of the device based at least in part on the terminated wave bit.

2. The method of claim 1 , further comprising:

performing the test operation for the first wave;

identifying a number of pixels associated with the first wave based at least in part on the test operation; and

determining, based at least in part on the test operation, to terminate all pixels of the identified number of pixels, wherein the determination to terminate the first wave is based at least in part on the determination to terminate all pixels of the identified number of pixels.

3. The method of claim 2 , wherein updating the number of invocations field associated with the first wave comprises:

updating the number of invocations field associated with the first wave to indicate the identified number of pixels.

4. The method of claim 1 , further comprising:

identifying a wave order associated with a set of waves based at least in part on a sequence queue, wherein the set of waves comprises at least the first wave; and

identifying the terminated wave bit based at least in part on the identified wave order, wherein the number of invocations field is output based at least in part on the identified terminated wave bit and the identified wave order.

5. The method of claim 1 , wherein updating the terminated wave bit and the number of invocations field comprises:

writing the terminated wave bit and the number of invocations field to an entry of a sequence queue corresponding to the first wave.

6. The method of claim 5 , further comprising:

identifying the terminated wave bit based at least in part on the sequence queue, wherein the number of invocations field is output based at least in part on the identified terminated wave bit and the identified wave order.

7. The method of claim 1 , further comprising:

receiving, at the rendering backend, the output number of invocations field; and

identifying a pixel ordering for rendering based at least in part on the received number of invocations field.

8. The method of claim 1 , further comprising:

processing one or more pixels of a second wave using a second slot;

processing one or more pixels of a third wave using the released first slot; and

processing one or more pixels of a fourth wave using a third slot.

9. The method of claim 8 , further comprising:

writing the terminated wave bit and the number of invocations field to a first entry of a sequence queue corresponding to the first wave;

writing the one or more pixels of the second wave to a second entry of the sequence queue corresponding to the second wave;

writing the one or more pixels of the third wave to a third entry of the sequence queue corresponding to the third wave; and

writing the one or more pixels of the fourth wave to a fourth entry of the sequence queue corresponding to the fourth wave.

10. The method of claim 9 , further comprising:

outputting, by a streaming processor of the device, the first entry, the second entry, the third entry, and the fourth entry to the rendering backend of the device based at least in part on the sequence queue; and

identifying a pixel ordering for rendering pixel information based at least in part on the number of invocations field associated with the first wave.

11. The method of claim 8 , further comprising:

performing a second test operation for the second wave; and

identifying a number of pixels associated with the second wave based at least in part on the second test operation, wherein the one or more pixels comprise a subset of the number of pixels associated with the second wave.

12. The method of claim 11 , further comprising:

outputting color information associated with the one or more pixels to the rendering backend of the device based at least in part on processing the one or more pixels of the second wave.

13. An apparatus for image processing at a device, comprising:

a processor,

memory coupled with the processor; and

instructions stored in the memory and executable by the processor to cause the apparatus to:

determine, based at least in part on a test operation, to terminate a first wave associated with a first slot of a set of slots;

update a terminated wave bit associated with the first slot based at least in part on the determination to terminate the first wave;

update a number of invocations field associated with the first wave based at least in part on the determination to terminate the first wave;

release the first slot based at least in part on updating the terminated wave bit and the number of invocations field; and

output the number of invocations field to a rendering backend of the device based at least in part on the terminated wave bit.

14. The apparatus of claim 13 , wherein the instructions are further executable by the processor to cause the apparatus to:

perform the test operation for the first wave;

identify a number of pixels associated with the first wave based at least in part on the test operation; and

determine, based at least in part on the test operation, to terminate all pixels of the identified number of pixels, wherein the determination to terminate the first wave is based at least in part on the determination to terminate all pixels of the identified number of pixels.

15. The apparatus of claim 14 , wherein the instructions to update the number of invocations field associated with the first wave are executable by the processor to cause the apparatus to:

update the number of invocations field associated with the first wave to indicate the identified number of pixels.

16. The apparatus of claim 13 , wherein the instructions are further executable by the processor to cause the apparatus to:

identify a wave order associated with a set of waves based at least in part on a sequence queue, wherein the set of waves comprises at least the first wave; and

identify the terminated wave bit based at least in part on the identified wave order, wherein the number of invocations field is output based at least in part on the identified terminated wave bit and the identified wave order.

17. The apparatus of claim 13 , wherein the instructions to update the terminated wave bit and the number of invocations field are executable by the processor to cause the apparatus to:

write the terminated wave bit and the number of invocations field to an entry of a sequence queue corresponding to the first wave.

18. The apparatus of claim 17 , wherein the instructions are further executable by the processor to cause the apparatus to:

identify the terminated wave bit based at least in part on the sequence queue, wherein the number of invocations field is output based at least in part on the identified terminated wave bit and the identified wave order.

19. The apparatus of claim 13 , wherein the instructions are further executable by the processor to cause the apparatus to:

receive, at the rendering backend, the output number of invocations field; and

identify a pixel ordering for rendering based at least in part on the received number of invocations field.

20. An apparatus for image processing at a device, comprising:

means for determining, based at least in part on a test operation, to terminate a first wave associated with a first slot of a set of slots;

means for updating a terminated wave bit associated with the first slot based at least in part on the determination to terminate the first wave;

means for updating a number of invocations field associated with the first wave based at least in part on the determination to terminate the first wave;

means for releasing the first slot based at least in part on updating the terminated wave bit and the number of invocations field; and

means for outputting the number of invocations field to a rendering backend of the device based at least in part on the terminated wave bit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2020
From: DU, YUN; YU, CHUN; GRUBER, ANDREW EVAN; YING, ZILIN; YANG, BAOGUANG
To: QUALCOMM INCORPORATED
Reel/Frame 053341/0919 →
Continuity (1)
Related Publication 20210209717A1 · Jul 8, 2021