IP Library › Granted Patent US 11,561,834
Granted Patent B2
US 11,561,834 · App. 16/743,271 · Granted Jan 24, 2023

Methods and systems for adaptive memory-resource management

Inventors: Joseph James Tringali (Los Altos, CA); Jianbing Chen (Plano, TX); Evan Lawrence Erickson (Chapel Hill, NC); Keith Lowrey (Garland, TX)
Assignee: Rambus Inc.
G06F9/5016G06F9/542G06F9/546G06F11/3037G06F12/0246G06N20/00G06F2212/7201
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Quick Facts
Patent No.
US 11,561,834
App. No.
16/743,271
Granted
Jan 24, 2023
Kind
B2
Abstract

Described are self-learning systems and methods for adaptive management of memory resources within a memory hierarchy. Memory allocations associated with different active functions are organized into blocks for placement in alternative levels in a memory hierarchy optimized for different metrics of e.g. cost and performance. A host processor monitors a performance metric of the active functions, such as the number of instructions per clock cycle, and reorganizes the function-specific blocks among the levels of the hierarchy. Over time, this process tends toward block organizations that improve the performance metric.

Claims (20)

1. A system for improving performance in executing an application program, the system comprising:

a first memory resource and a second memory resource; and

a host processor communicatively coupled to the memory resources via one or more interfaces;

the host processor to:

receive a memory-allocation function call from the application program to allocate storage for data;

allocate the storage for the data in the first memory resource;

write the data to the first memory resource;

access the data within the first memory resource;

generate a measure of performance for accessing the data;

use a machine-learning engine to determine to move the data from the first memory resource to the second memory resource responsive to the measure of performance;

issue memory-allocation instructions on behalf of the application program to the first and second memory resources to move the data from the first memory resource to the second memory resource based on the determination; and

issue memory-allocation function calls responsive to the determination and without modifying the application program.

2. The system of claim 1 , further comprising a proxy executing on the host processor to store metadata descriptive of the memory-allocation function calls.

3. The system of claim 2 , wherein the host processor issues the memory-allocation instructions responsive to the memory-allocation function calls.

4. The system of claim 2 , further comprising a digest communicatively coupled to the proxy to periodically summarize the memory-allocation function calls.

5. The system of claim 4 , further comprising a metablock manager executing on the host processor and coupled to the digest, the metablock manager to group the memory-allocation function calls into metablocks, wherein a metablock specifies addresses of the data for at least one function of the application program.

6. The system of claim 5 , wherein the metablock manager conveys the metablocks to a memory optimizer executing on the host processor.

7. The system of claim 6 , wherein the memory optimizer executing on the host processor moves the data for the at least one function of the application program from the addresses of the data in the first memory resource to second addresses in the second memory resource.

8. The system of claim 1 , wherein the first memory resource is local to the host processor and the second memory resource is remote from the host processor.

9. The system of claim 1 , wherein the measure of performance comprises a number of instructions executed per cycle by the host.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2020
From: TRINGALI, JOSEPH JAMES; CHEN, JIANBING; ERICKSON, EVAN LAWRENCE; LOWERY, KEITH
To: RAMBUS INC.
Reel/Frame 051815/0053 →
Continuity (2)
Provisional Application 62793019 · Jan 16, 2019
Related Publication 20200225993A1 · Jul 16, 2020
Cited By (1)
US 12,340,260