Readout method, readout circuit and sensing apparatus with wide dynamic range
View Patent ↗A readout circuit that includes an amplifier circuitry, an analog-to-digital converter, a feedback circuit and a control logic is introduced. The amplifier circuitry may receive and amplify a differential signal that is obtained according to an input signal and a feedback signal to generate an amplified signal. The analog-to-digital converter is configured to convert the amplified signal to generate a n-bit digital code, wherein n is a positive integer. The feedback circuit is configured to search and generate a m-bit digital code based on a value of the n-bit digital code and convert the m-bit digital code to generate the feedback signal, wherein m is a positive integer. The control logic is coupled to the analog-to-digital converter and the feedback circuit, and configured to control the analog-to-digital converter and the feedback circuit. A multi-bit digital output of the readout circuit is generated according to the n-bit digital code and the m-bit digital code.
1. A readout circuit, comprising:
an amplifier circuitry, configured to receive and amplify a differential signal that is obtained according to an input signal and a feedback signal to generate an amplified signal;
an analog-to-digital converter, coupled to the amplifier circuitry, configured to convert the amplified signal to generate a n-bit digital code, wherein n is a positive integer;
a feedback circuit, configured to search and generate a m-bit digital code based on a value of the n-bit digital code and convert the m-bit digital code to generate the feedback signal, wherein m is a positive integer; and
a control logic, coupled to the analog-to-digital converter and the feedback circuit, and configured to control the analog-to-digital converter and the feedback circuit, wherein the n-bit digital code is combined with the m-bit digital code to generate a multi-bit digital output of the readout circuit.
2. The readout circuit of claim 1 , wherein
the m-bit digital code comprises a most-significant-bit of the multi-bit digital output; and
the n-bit digital code comprises a least-significant-bit of the multi-bit digital output.
3. The readout circuit of claim 1 , wherein the feedback circuit comprises:
a digital-to-analog converter, configured to convert the m-bit digital code to generate the feedback signal.
4. The readout circuit of claim 1 , further comprising:
a differential circuit, coupled to the feedback circuit, configured to calculate a difference between the input signal and the feedback signal to generate the differential signal.
5. The readout circuit of claim 4 , wherein
the digital-to-analog converter is a successive approximation resister digital-to-analog converter; and
the analog-to-digital converter is a successive approximation resister analog-to-digital converter.
6. The readout circuit of claim 4 , wherein
the input signal and the feedback signal are voltage signals, and
the amplifier circuitry comprises:
a first resistor, coupled to the differential circuit;
an amplifier, having a first input terminal and a second input terminal, wherein the first input terminal is coupled to the first resistor, and the second input terminal is coupled to a reference node; and
a second resistor, coupled to the amplifier in parallel, wherein the second resistor is coupled between the first input terminal and an output terminal of the amplifier.
7. The readout circuit of claim 1 , wherein
the input signal and the feedback signal are current signals, and
the amplifier circuitry comprises:
an amplifier, having a first input terminal and a second input terminal, wherein the first input terminal is configured to receive the differential signal, and the second input terminal is coupled to a reference node; and
a resistor, coupled to the amplifier in parallel, wherein the resistor is coupled between the first input terminal and an output terminal of the amplifier.
8. The readout circuit of claim 1 , wherein the amplifier circuitry is configured to amplify the differential signal with a fixed amplification gain to generate the amplified signal.
9. A sensing apparatus, comprising:
a sensor, configured to generate an input signal;
a readout circuit, coupled to the sensor to receive the input signal, configured to search and generate a multi-bit digital output based on the input signal, wherein the readout circuit comprises:
an amplifier circuitry, configured to receive and amplify a differential signal that is obtained according to the input signal and a feedback signal to generate an amplified signal;
an analog-to-digital converter, coupled to the amplifier circuitry, configured to convert the amplified signal to generate a n-bit digital code, wherein n is a positive integer;
a feedback circuit, configured to search and generate a m-bit digital code based on a value of the n-bit digital code and convert the m-bit digital code to generate the feedback signal, wherein m is a positive integer; and
a control logic, coupled to the analog-to-digital converter and the feedback circuit, and configured to control the analog-to-digital converter and the feedback circuit, wherein the n-bit digital code is combined with the m-bit digital code to generate the multi-bit digital output.
10. The sensing apparatus of claim 9 , wherein
the m-bit digital code comprises a most-significant-bit of the multi-bit digital output; and
the n-bit digital code comprises a least-significant-bit of the multi-bit digital output.
11. The sensing apparatus of claim 9 , wherein the feedback circuit comprises:
a digital-to-analog converter, configured to convert the m-bit digital code to generate the feedback signal.
12. The sensing apparatus of claim 9 , wherein the readout circuit further comprises:
a differential circuit, coupled to the feedback circuit, configured to calculate a difference between the input signal and the feedback signal to generate the differential signal.
13. The sensing apparatus of claim 12 , wherein
the digital-to-analog converter is a successive approximation resister digital-to-analog converter; and
the analog-to-digital converter is a successive approximation resister analog-to-digital converter.
14. The sensing apparatus of claim 12 , wherein
the input signal and the feedback signal are voltage signals, and
the amplifier circuitry comprises:
a first resistor, coupled to the differential circuit;
an amplifier, having a first input terminal and a second input terminal, wherein the first input terminal is coupled to the first resistor, and the second input terminal is coupled to a reference node; and
a second resistor, coupled to the amplifier in parallel, wherein the second resistor is coupled between the first input terminal and an output terminal of the amplifier.
15. The sensing apparatus of claim 9 , wherein
the input signal and the feedback signal are current signals, and
the amplifier circuitry comprises:
an amplifier, having a first input terminal and a second input terminal, wherein the first input terminal is configured to receive the differential signal, and the second input terminal is coupled to a reference node; and
a resistor, coupled to the amplifier in parallel, wherein the resistor is coupled between the first input terminal and an output terminal of the amplifier.
16. The sensing apparatus of claim 9 , wherein the amplifier circuitry is configured to amplify the differential signal with a fixed amplification gain to generate the amplified signal.
17. A readout method, comprising:
receiving and amplifying a differential signal that is obtained according to an input signal and a feedback signal to generate an amplified signal;
converting the amplified signal to generate a n-bit digital code, wherein n is a positive integer;
searching and generating a m-bit digital code based on a value of the n-bit digital code and converting the m-bit digital code to generate the feedback signal, wherein m is a positive integer; and
combining the n-bit digital code with the m-bit digital code to generate a multi-bit digital output.
18. The readout method of claim 17 ,
wherein the m-bit digital code comprises a most-significant-bit of the multi-bit digital output, and the n-bit digital code comprises a least-significant-bit of the multi-bit digital output.
19. The readout method of claim 17 , wherein the differential signal is amplified with a fixed amplification gain to generate the amplified signal.
20. The readout method of claim 17 , wherein
the input signal and the feedback signal are voltage signals or current signals.